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Releases: wolfSSL/wolfHSM

wolfHSM-v1.2.0

27 Jun 19:42
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wolfHSM Release v1.2.0 (June 27, 2025)

Due to NDA restrictions, access to the Infineon, ST Micro, and Renesas ports is limited. Please contact [email protected] for access.

New Feature Additions

  • Basic X509 certificate support in #96
  • DMA support for CMAC in #97
  • attribute certificate support in #101
  • Add benchmark framework in #107
  • client/server-only builds + relocate examples in #122

Bug Fixes

  • Fix flashunit program in #104
  • Keycache test fixes in #125

Enhancements and Optimizations

  • Refactor DMA API to be generic across all address sizes in #102
  • Remove whPacket union in #103
  • set RNG on curve25519 keys to support blinding in #109
  • new x509 API: verify and cache pubKey in #110
  • Add hierarchical makefiles in #124

wolfHSM-v1.1.0

23 Jan 20:16
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wolfHSM Release v1.1.0 (January 23, 2025)

Due to NDA restrictions, access to the Infineon and ST Micro ports is limited. Please contact [email protected] for access.

New Feature Additions

  • Added support for ML-DSA (PR#84 and PR#86)
  • Added support for DMA-based keystore operations (PR#85)

Bug Fixes

  • Fixes memory error in ECC verify (PR#81)
  • Removes unused argument warnings on 32 bit targets (PR#82)
  • Fixes memory leak in SHE test (PR#88)

Enhancements and Optimizations

  • Improved handling of Curve25519 DER encoded keys using new wolfCrypt APIs (PR#83)

Update with Bug Fix

21 Oct 16:53
f8e2b9c
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wolfHSM Release v1.0.1 (October 21, 2024)

Bug-fix release. Due to NDA restrictions, access to the Infineon and ST Micro ports is limited. Please contact [email protected] for access.

New Feature Additions

  • Initial release of whnvmtool to pre-build NVM images (PR#77)

Bug Fixes

  • Corrected FreshenKey server function to load keys from NVM when not in cache (PR#78)

Enhancements and Optimizations

  • Updated RSA key handling to support private-only and public-only keys (PR#76)

Initial Release

05 Oct 14:17
7c1c8b1
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Initial release after internal and early evaluator testing. Due to NDA restrictions, access to the Infineon and ST Micro ports is limited. Please contact [email protected] for access.

New Feature Additions

  • POSIX simulator and test environment
  • Memory fencing and cache controls for memory transport
  • Support for Aurix Tricore TC3xx and ST SPC58NN
  • DMA support for SHA2 and NVM objects
  • Cancellation for CMAC
  • Support NO_MALLOC and STATIC_MEMORY
  • SHE+ interface

Enhancements and Optimizations

  • Reduction in static server memory requirements
  • Hardware offload for AURIX and ST C3 modules