Skip to content

pre-commit: PR126423 #2110

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Open
wants to merge 3 commits into
base: main
Choose a base branch
from
Open

pre-commit: PR126423 #2110

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
3 commits
Select commit Hold shift + click to select a range
9c5a115
pre-commit: PR126423
nikic Feb 9, 2025
8afc865
pre-commit: Update
github-actions[bot] Feb 9, 2025
ea0861b
pre-commit: Remap
github-actions[bot] Feb 9, 2025
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
58 changes: 27 additions & 31 deletions bench/llvm/optimized/X86RegisterBankInfo.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -579,9 +579,6 @@ _ZNK4llvm3LLT13getSizeInBitsEv.exit: ; preds = %22, %24

.thread: ; preds = %_ZNK4llvm3LLT13getSizeInBitsEv.exit
%.pre74 = and i64 %34, 2
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %5) #13
%.not = icmp eq i64 %.pre74, 0
%36 = select i1 %.not, i64 32, i64 48
br label %_ZNK4llvm3LLT13getSizeInBitsEv.exit42

37: ; preds = %_ZNK4llvm3LLT13getSizeInBitsEv.exit
Expand All @@ -593,40 +590,39 @@ _ZNK4llvm3LLT13getSizeInBitsEv.exit: ; preds = %22, %24
%or.cond = and i1 %spec.select.i.i, %41
br i1 %or.cond, label %42, label %_ZNK4llvm3LLT9isPointerEv.exit.thread

42: ; preds = %37
42: ; preds = %.thread, %37
%.pre-phi75 = phi i64 [ %.pre74, %_ZNK4llvm3LLT13getSizeInBitsEv.exit._crit_edge ], [ %38, %36 ]
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %5) #13
br label %_ZNK4llvm3LLT13getSizeInBitsEv.exit42

_ZNK4llvm3LLT13getSizeInBitsEv.exit42: ; preds = %.thread, %42
%.0.in.v.i.i40 = phi i64 [ %36, %.thread ], [ 48, %42 ]
%.not.i.i.i39.not = icmp eq i64 %.pre-phi75, 0
%.0.in.v.i.i40 = select i1 %.not.i.i.i39.not, i64 32, i64 48
%.0.in.i.i41 = lshr i64 %34, %.0.in.v.i.i40
store i64 %.0.in.i.i41, ptr %5, align 8
%.sroa.28.0..sroa_idx = getelementptr inbounds nuw i8, ptr %5, i64 8
store i8 0, ptr %.sroa.28.0..sroa_idx, align 8
%43 = call noundef i64 @_ZNK4llvm8TypeSizecvmEv(ptr noundef nonnull align 8 dereferenceable(9) %5) #13
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %5) #13
switch i64 %43, label %48 [
switch i64 %43, label %46 [
i64 1, label %69
i64 8, label %69
i64 16, label %44
i64 32, label %45
i64 64, label %46
i64 128, label %47
i64 16, label %42
i64 32, label %43
i64 64, label %44
i64 128, label %45
]

42: ; preds = %_ZNK4llvm3LLT13getSizeInBitsEv.exit42
br label %67

43: ; preds = %_ZNK4llvm3LLT13getSizeInBitsEv.exit42
br label %67

44: ; preds = %_ZNK4llvm3LLT13getSizeInBitsEv.exit42
br label %69

45: ; preds = %_ZNK4llvm3LLT13getSizeInBitsEv.exit42
br label %69

46: ; preds = %_ZNK4llvm3LLT13getSizeInBitsEv.exit42
br label %69

47: ; preds = %_ZNK4llvm3LLT13getSizeInBitsEv.exit42
br label %69

48: ; preds = %_ZNK4llvm3LLT13getSizeInBitsEv.exit42
unreachable

_ZNK4llvm3LLT9isPointerEv.exit.thread: ; preds = %37
Expand All @@ -644,25 +640,25 @@ _ZNK4llvm3LLT13getSizeInBitsEv.exit57: ; preds = %_ZNK4llvm3LLT9isPoi
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %6) #13
%50 = add i64 %49, -32
%51 = call i64 @llvm.fshl.i64(i64 %50, i64 %50, i64 60)
switch i64 %51, label %57 [
i64 0, label %52
i64 2, label %54
switch i64 %51, label %55 [
i64 0, label %50
i64 2, label %52
i64 6, label %69
i64 3, label %56
i64 3, label %54
]

50: ; preds = %_ZNK4llvm3LLT13getSizeInBitsEv.exit57
%51 = select i1 %13, i32 4, i32 9
br label %67

52: ; preds = %_ZNK4llvm3LLT13getSizeInBitsEv.exit57
%53 = select i1 %13, i32 4, i32 9
%53 = select i1 %14, i32 5, i32 10
br label %69

54: ; preds = %_ZNK4llvm3LLT13getSizeInBitsEv.exit57
%55 = select i1 %14, i32 5, i32 10
br label %69
br label %67

56: ; preds = %_ZNK4llvm3LLT13getSizeInBitsEv.exit57
br label %69

57: ; preds = %_ZNK4llvm3LLT13getSizeInBitsEv.exit57
unreachable

_ZNK4llvm3LLT13getSizeInBitsEv.exit72: ; preds = %_ZNK4llvm3LLT9isPointerEv.exit.thread
Expand Down Expand Up @@ -698,8 +694,8 @@ _ZNK4llvm3LLT13getSizeInBitsEv.exit72: ; preds = %_ZNK4llvm3LLT9isPoi
68: ; preds = %_ZNK4llvm3LLT13getSizeInBitsEv.exit72
unreachable

69: ; preds = %_ZNK4llvm3LLT13getSizeInBitsEv.exit72, %_ZNK4llvm3LLT13getSizeInBitsEv.exit57, %_ZNK4llvm3LLT13getSizeInBitsEv.exit42, %_ZNK4llvm3LLT13getSizeInBitsEv.exit42, %67, %66, %56, %54, %52, %47, %46, %45, %44
%.0 = phi i32 [ 6, %47 ], [ 3, %46 ], [ 2, %45 ], [ 1, %44 ], [ 11, %56 ], [ %55, %54 ], [ %53, %52 ], [ 8, %67 ], [ 7, %66 ], [ 0, %_ZNK4llvm3LLT13getSizeInBitsEv.exit42 ], [ 0, %_ZNK4llvm3LLT13getSizeInBitsEv.exit42 ], [ 6, %_ZNK4llvm3LLT13getSizeInBitsEv.exit57 ], [ 6, %_ZNK4llvm3LLT13getSizeInBitsEv.exit72 ]
69: ; preds = %_ZNK4llvm3LLT13getSizeInBitsEv.exit72, %_ZNK4llvm3LLT13getSizeInBitsEv.exit57, %_ZNK4llvm3LLT13getSizeInBitsEv.exit42, %_ZNK4llvm3LLT13getSizeInBitsEv.exit42, %67, %66, %54, %52, %50, %45, %44, %43, %42
%.0 = phi i32 [ 6, %45 ], [ 3, %44 ], [ 2, %43 ], [ 1, %42 ], [ 11, %54 ], [ %53, %52 ], [ %51, %50 ], [ 8, %67 ], [ 7, %66 ], [ 0, %_ZNK4llvm3LLT13getSizeInBitsEv.exit42 ], [ 0, %_ZNK4llvm3LLT13getSizeInBitsEv.exit42 ], [ 6, %_ZNK4llvm3LLT13getSizeInBitsEv.exit57 ], [ 6, %_ZNK4llvm3LLT13getSizeInBitsEv.exit72 ]
ret i32 %.0
}

Expand Down
2 changes: 1 addition & 1 deletion bench/meshoptimizer/optimized/indexcodec.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -369,7 +369,7 @@ _ZN7meshoptL15getCodeAuxIndexEhPKh.exit: ; preds = %for.body.i184
br i1 %brmerge, label %if.else165, label %if.then161

if.then161: ; preds = %_ZN7meshoptL15getCodeAuxIndexEhPKh.exit
%36 = trunc i64 %indvars.iv.i185 to i8
%36 = trunc nuw i64 %indvars.iv.i185 to i8
%conv163 = or disjoint i8 %36, -16
store i8 %conv163, ptr %code.0315, align 1
br label %if.end170
Expand Down
41 changes: 21 additions & 20 deletions bench/opencv/optimized/find_ellipses.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -2165,7 +2165,7 @@ _ZNSt6vectorIN2cv6Point_IiEESaIS2_EE9push_backERKS2_.exit.us: ; preds = %_ZNSt6v
%.5.us = phi i32 [ %207, %203 ], [ %.4.us, %191 ], [ %.4.us, %190 ]
%.not138.us = xor i1 %127, true
%brmerge.us = or i1 %158, %.not138.us
br i1 %brmerge.us, label %225, label %209
br i1 %brmerge.us, label %226, label %209

209: ; preds = %208
%210 = add nsw i32 %112, 1
Expand All @@ -2175,26 +2175,27 @@ _ZNSt6vectorIN2cv6Point_IiEESaIS2_EE9push_backERKS2_.exit.us: ; preds = %_ZNSt6v
%214 = sext i32 %210 to i64
%215 = mul i64 %213, %214
%216 = getelementptr inbounds i8, ptr %211, i64 %215
%217 = getelementptr i8, ptr %216, i64 %119
%218 = getelementptr i8, ptr %217, i64 -1
%219 = load i8, ptr %218, align 1
%.not135.us = icmp eq i8 %219, 0
br i1 %.not135.us, label %225, label %220

220: ; preds = %209
%221 = add i32 %24, %110
%222 = zext nneg i32 %.5.us to i64
%223 = getelementptr inbounds nuw [2048 x i32], ptr %5, i64 0, i64 %222
store i32 %221, ptr %223, align 4
%224 = add nuw nsw i32 %.5.us, 1
br label %225

225: ; preds = %220, %209, %208
%.6.us = phi i32 [ %224, %220 ], [ %.5.us, %209 ], [ %.5.us, %208 ]
%217 = zext nneg i32 %111 to i64
Copy link

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Regression due to lack of sext vs zext nneg CSE.

%218 = getelementptr i8, ptr %216, i64 %217
%219 = getelementptr i8, ptr %218, i64 -1
%.not135.us = load i8, ptr %219, align 1
%.not135.us = icmp eq i8 %220, 0
br i1 %.not135.us, label %226, label %221

221:; preds = %209
%222 = add i32 %24, %110
%223 = zext nneg i32 %.5.us to i64
%224 = getelementptr inbounds nuw [2048 x i32], ptr %5, i64 0, i64 %223
store i32 %222, ptr %224, align 4
%225 = add nuw nsw i32 %.5.us, 1
br label %226

226:; preds = %221, %209, %208
%.6.us = phi i32 [ %225, %221 ], [ %.5.us, %209 ], [ %.5.us, %208 ]
%or.cond3.us = and i1 %175, %141
br i1 %or.cond3.us, label %226, label %242

226: ; preds = %225
226: ; preds = %226
%227 = add nsw i32 %112, -1
%228 = load ptr, ptr %21, align 8
%229 = load ptr, ptr %22, align 8
Expand All @@ -2217,8 +2218,8 @@ _ZNSt6vectorIN2cv6Point_IiEESaIS2_EE9push_backERKS2_.exit.us: ; preds = %_ZNSt6v
%241 = add nuw nsw i32 %.6.us, 1
br label %242

242: ; preds = %237, %226, %225
%.7.us = phi i32 [ %241, %237 ], [ %.6.us, %226 ], [ %.6.us, %225 ]
242: ; preds = %237, %226, %226
%.7.us = phi i32 [ %241, %237 ], [ %.6.us, %226 ], [ %.6.us, %226 ]
%.not140.us = xor i1 %175, true
%brmerge142.us = or i1 %158, %.not140.us
br i1 %brmerge142.us, label %259, label %243
Expand Down
2 changes: 1 addition & 1 deletion scripts/setup_pre_commit_patch.sh
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@
set -euo pipefail
shopt -s inherit_errexit

export GITHUB_PATCH_ID="<user_name>/llvm-project/commit/<commit_hash>"
export GITHUB_PATCH_ID=llvm/llvm-project/pull/126423
export COMPTIME_MODE=0

# Please rebase manually
Expand Down