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Extend EDID to support CEA-861 block in the output #127

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CarlFK opened this issue Nov 8, 2015 · 3 comments
Open

Extend EDID to support CEA-861 block in the output #127

CarlFK opened this issue Nov 8, 2015 · 3 comments

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@CarlFK
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CarlFK commented Nov 8, 2015

I am not suggesting anything, just posting these comments.
from:
http://logs.timvideos.us/%23timvideos/%23timvideos.2015-11-08.log.html#t2015-11-08T11:24:45

(10:49:55 AM) tumbleweed: CarlFK: no, it sees 640x480, even though the chromebook says it's sending 1024x768
(10:50:04 AM) tumbleweed: if I switch to mode 0, it works :(

(11:02:53 AM) tumbleweed: so, apparently all HDMI are required to support 640x480@60, which is why when the chromebook is given a mode it won't support, it went back to it
(11:03:02 AM) tumbleweed: (I just had an HDMI engineer come over and talk to me)

(11:03:21 AM) tumbleweed: he also suggests outputting a CEA-861 block https://en.wikipedia.org/wiki/Extended_Display_Identification_Data#EDID_1.3_data_format

(11:06:08 AM) tumbleweed: he said "ah, that's only 128 bytes, you should send the CEA-861 block too"
(11:06:15 AM) tumbleweed: matthew sweet, btw

@mithro
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mithro commented Nov 9, 2015

Related issues:

@mithro mithro changed the title HDMI required to support 640x480@60 Extend EDID to support CEA-861 block in the output Nov 9, 2015
@mithro
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mithro commented Mar 19, 2017

@joeladdison

@joeladdison
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@mithro Ah yes, I know all about that. It won't be hard to add the extra block on to the end.

We will just have to work out if we are going to follow the spec by supporting the fallback resolution, of if we just keep as is with how it is now and only display the one (or two) resolutions.

@joeladdison joeladdison self-assigned this Mar 20, 2017
mithro pushed a commit that referenced this issue Dec 16, 2018
 * litedram changed from 30d9a3e to bc6a3f2
    * bc6a3f2 - examples/sim/sim/py: remove apb interface <Florent Kermarrec>
    * e7e4bc5 - examples/sim: add ddr3 micron model <Florent Kermarrec>
    * f219693 - examples: add simulation <Florent Kermarrec>

 * litepcie changed from 48f662e to dddd3b1
    * dddd3b1 - phy/s7pciephy: fix soft reset by reseting pcie on cd reset <Florent Kermarrec>

 * litevideo changed from 13d85a1 to 0993a4e
    * 0993a4e - Merge pull request #21 from felixheld/licensefix <Tim Ansell>
    * d8287db - LICENSE: use right project name <Felix Held>

 * litex changed from bc173380 to ab799f7b
    *   ab799f7b - Merge pull request #127 from cr1901/picorv32-data <Tim Ansell>
    |\
    | * 89c70218 - libbase/crt0-picorv32: Add support for .data sections. <William D. Jones>
    |/
    * 80bdae0e - build/sim/verilator: add trace parameter to enable tracer <Florent Kermarrec>
    * 7359a99b - soc_core: convert cpu_type="None" string to None <Florent Kermarrec>
    * 5805d630 - build/microsemi/libero_soc: only associate timings constraint to timing check (otherwise we loose io constraints...), use default settings for place & route <Florent Kermarrec>
    * 85f76662 - build/microsemi/common: add async reset synchronizer (using DFN1P0) <Florent Kermarrec>
    * e3c6bd58 - build/microsemi/libero_soc: pass timing constraints to synthesis, place & route and timing verification tools <Florent Kermarrec>
    * 4c966114 - build/microsemi/libero_soc: add timing constraints support <Florent Kermarrec>
    * 60faae49 - boards/platforms/avalanche: fix swapped serial pins <Florent Kermarrec>
    * 52396add - boards/platforms/avalanche: rename rst to rst_n (active low reset) <Florent Kermarrec>
    * 8e07e1a0 - build/microsemi/libero_soc: associate .pdc to place and route tool. <Florent Kermarrec>
    * 5137c2bf - test/test_targets: update <Florent Kermarrec>
    * a5ed42ec - soc/interconnect/stream: add Gearbox <Florent Kermarrec>
    * 11d536dc - test: remove test_bitslip (integrated in migen) <Florent Kermarrec>
    * a25645af - utils: add litex_read_verilog utility <Florent Kermarrec>
    * a538d362 - create utils directory and move the litex utils to it <Florent Kermarrec>
    * 45ec78e9 - build/microsemi/libero_soc: able to generate design script (tcl) and design constraint (pdc) for libero soc / avalanche board. <Florent Kermarrec>
    * 4cb6583b - build: add microsemi template for polarfire fpgas support <Florent Kermarrec>

 * migen changed from 0.6.dev-209-gc285c12 to 0.6.dev-211-g022721a
    * 022721a - lattice/diamond: Support sourcing by default. <William D. Jones>
    * 17e6d34 - fix yosys commands for build_names other than 'top' <Erin Moon>

Full submodule status
--
 5eeb151a748788666534d6ea3da07f90400d24c2 edid-decode (remotes/origin/HEAD)
 a628956da7dc794e6e3c95b31ff9ce3af58bc763 flash_proxies (remotes/origin/HEAD)
 bc6a3f220a16fbc1208cc23ab5cf072d2b81f62e litedram (remotes/origin/HEAD)
 52c23015b052e40600a84ac73227fb5a0f0ce862 liteeth (remotes/origin/HEAD)
 dddd3b16edfc9b345526f4106954b2c6b6f00933 litepcie (remotes/origin/HEAD)
 b78a73110c0c26cf21bf1410329bf1e78286e929 litesata (remotes/origin/HEAD)
 1634fa35bb9f2717ab355ca2e494e1d02fd489ec litescope (remotes/origin/HEAD)
 0a9110f901182a1233cc4e64b6e39175f6784621 liteusb (remotes/origin/HEAD)
 0993a4e0422454e522e1d2b491837034b8dcccbe litevideo (remotes/origin/HEAD)
 ab799f7bd7e0ad2063747dc6636de61225e648c4 litex (remotes/origin/HEAD)
 022721a81d274a08ccb1b1f7919d4940cce99a73 migen (0.6.dev-211-g022721a)
mithro added a commit that referenced this issue May 31, 2019
scripts: Add Renode emulation support.
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