Skip to content

[202012]Add config3 register which is used to get COMEX CPU board version #285

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 1 commit into from
Jul 16, 2022
Merged

[202012]Add config3 register which is used to get COMEX CPU board version #285

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
56 changes: 56 additions & 0 deletions patch/0153-platform-mellanox-Add-config3-register-support.patch
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -0,0 +1,56 @@
From bf9905c1e297307b86d87a809bd42f343bd20cf6 Mon Sep 17 00:00:00 2001
From: Oleksandr Shamray <[email protected]>
Date: Mon, 20 Jun 2022 16:02:14 +0300
Subject: [PATCH] platform: mellanox: Add config3 register support

Add config3 register which is using to get COMEX CPU board version

Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

I do not see this change in Linus’ master branch. Please mention the upstream status.

Signed-off-by: Oleksandr Shamray <[email protected]>
---
drivers/platform/x86/mlx-platform.c | 9 +++++++++
1 file changed, 9 insertions(+)

diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c
index defa87b44..ee4f8c7c6 100644
--- a/drivers/platform/x86/mlx-platform.c
+++ b/drivers/platform/x86/mlx-platform.c
@@ -105,6 +105,7 @@
#define MLXPLAT_CPLD_LPC_REG_PSU_I2C_CAP_OFFSET 0xf9
#define MLXPLAT_CPLD_LPC_REG_CONFIG1_OFFSET 0xfb
#define MLXPLAT_CPLD_LPC_REG_CONFIG2_OFFSET 0xfc
+#define MLXPLAT_CPLD_LPC_REG_CONFIG3_OFFSET 0xfd
#define MLXPLAT_CPLD_LPC_IO_RANGE 0x100
#define MLXPLAT_CPLD_LPC_I2C_CH1_OFF 0xdb
#define MLXPLAT_CPLD_LPC_I2C_CH2_OFF 0xda
@@ -1806,6 +1807,12 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = {
.bit = GENMASK(7, 0),
.mode = 0444,
},
+ {
+ .label = "config3",
+ .reg = MLXPLAT_CPLD_LPC_REG_CONFIG3_OFFSET,
+ .bit = GENMASK(7, 0),
+ .mode = 0444,
+ },
{
.label = "ufm_version",
.reg = MLXPLAT_CPLD_LPC_REG_UFM_VERSION_OFFSET,
@@ -2267,6 +2274,7 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg)
case MLXPLAT_CPLD_LPC_REG_PSU_I2C_CAP_OFFSET:
case MLXPLAT_CPLD_LPC_REG_CONFIG1_OFFSET:
case MLXPLAT_CPLD_LPC_REG_CONFIG2_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_CONFIG3_OFFSET:
case MLXPLAT_CPLD_LPC_REG_UFM_VERSION_OFFSET:
return true;
}
@@ -2350,6 +2358,7 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg)
case MLXPLAT_CPLD_LPC_REG_PSU_I2C_CAP_OFFSET:
case MLXPLAT_CPLD_LPC_REG_CONFIG1_OFFSET:
case MLXPLAT_CPLD_LPC_REG_CONFIG2_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_CONFIG3_OFFSET:
case MLXPLAT_CPLD_LPC_REG_UFM_VERSION_OFFSET:
return true;
}
--
2.20.1

1 change: 1 addition & 0 deletions patch/series
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -85,6 +85,7 @@ net-sch_generic-fix-the-missing-new-qdisc-assignment.patch
0032-platform-mellanox-mlxreg-hotplug-Use-capability-regi.patch
0064-platform-mellanox-mlxreg-io-Fix-read-access-of-n-byt.patch
0144-platform-x86-mlx-platform-Fix-cpld-_pn-register-seco.patch
0153-platform-mellanox-Add-config3-register-support.patch

# Cisco patches for 4.19 kernel
cisco-ds4424-null-of-node.patch
Expand Down