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Support AS4630-54NPE #11804

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097e8a1
Support AS4630-54NPE
chihhan123 Aug 22, 2022
3993683
Delete as4630_54npe_extphy.soc
chihhan123 Aug 24, 2022
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35 changes: 35 additions & 0 deletions device/accton/x86_64-accton_as4630_54npe-r0/Accton-AS4630-54NPE/as4630_54npe_extphy.soc
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# initial external-physical with cold-start
# Physis adress, numbers and FW load type
oyster init 0x00 8 u
oyster init 0x08 8 u
oyster init 0x10 8 u
oyster init 0x40 8 u
oyster init 0x48 4 u
oyster init 0x50 4 u
oyster init 0x54 4 u
oyster init 0x58 4 u

# usxgmii without autoneg
for i=0x00,0x17,1,%x 'oyster sif 0x$i usx 0'
for i=0x40,0x4b,1,%x 'oyster sif 0x$i usx 0'

# xfi
for i=0x50,0x5b,1,%x 'oyster sif 0x$i'

# 2500full/1000full/100full
for i=0x00,0x17,1,%x 'oyster ad 0x$i 2f 1f .1f'
for i=0x40,0x4b,1,%x 'oyster ad 0x$i 2f 1f .1f'

# 10Gfull/5000full/2500full/1000full/100full
for i=0x50,0x5b,1,%x 'oyster ad 0x$i 10f 5f 2f 1f .1f'

for i=0x00,0x17,1,%x 'oyster an 0x$i 1'
for i=0x40,0x4b,1,%x 'oyster an 0x$i 1'
for i=0x50,0x5b,1,%x 'oyster an 0x$i 1'

for i=0x00,0x17,1,%x 'oyster en 0x$i 0'
for i=0x40,0x4b,1,%x 'oyster en 0x$i 0'
for i=0x50,0x5b,1,%x 'oyster en 0x$i 0'

as4630_54npe phy_linkscan on
link force=all
265 changes: 265 additions & 0 deletions ..._64-accton_as4630_54npe-r0/Accton-AS4630-54NPE/hx5-as4630-36x2p5G+12x10G+4x25G+2x100G.bcm
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stable_size=76303168

#polarity/lanemap is using TH2 style.
core_clock_frequency=893
dpp_clock_ratio=2:3

ptp_ts_pll_fref=50000000
ptp_bs_fref_0=50000000
ptp_bs_fref_1=50000000

#oversubscribe_mode=2
pbmp_oversubscribe=0x0

pbmp_xport_xe=0x7FFFFFFFFFFFFFFE

parity_enable=0
mem_cache_enable=1

l2_mem_entries=32768
l3_alpm_enable=2
ipv6_lpm_128b_enable=1
#l3_mem_entries=49152
#fpem_mem_entries=16384
l2xmsg_mode=1
port_flex_enable=1
pcie_hot_swap_timeout_usec=10000
ifp_inports_support_enable=1

#3x PM4x10Q (3 * 16 = 48 physical ports)
#Doesn't support oversubscribe in Q mode
#MCQ0
port_gmii_mode_1=2 #Q mode

#riot vxlan
#dport_map_direct=1
flow_init_mode=1
riot_enable=1
riot_overlay_l3_intf_mem_size=4096
riot_overlay_l3_egress_mem_size=8192
l3_ecmp_levels=2
riot_overlay_ecmp_resilient_hash_size=16384
use_all_splithorizon_groups=1
host_as_route_disable=1
max_vp_lags=448

#PHY4 U56 xx1, MDC/MDIO2, PHYADDR:0x00-0x07, 0x08
dport_map_port_1=2
dport_map_port_2=1
dport_map_port_3=4
dport_map_port_4=3
dport_map_port_5=6
dport_map_port_6=5
dport_map_port_7=8
dport_map_port_8=7
dport_map_port_9=10
dport_map_port_10=9
dport_map_port_11=12
dport_map_port_12=11
dport_map_port_13=14
dport_map_port_14=13
dport_map_port_15=16
dport_map_port_16=15
portmap_1=1:2.5
portmap_2=2:2.5
portmap_3=3:2.5
portmap_4=4:2.5
portmap_5=5:2.5
portmap_6=6:2.5
portmap_7=7:2.5
portmap_8=8:2.5
portmap_9=9:2.5
portmap_10=10:2.5
portmap_11=11:2.5
portmap_12=12:2.5
portmap_13=13:2.5
portmap_14=14:2.5
portmap_15=15:2.5
portmap_16=16:2.5
phy_chain_rx_polarity_flip_physical{1.0}=0x0
phy_chain_rx_polarity_flip_physical{2.0}=0x0
phy_chain_rx_polarity_flip_physical{3.0}=0x0
phy_chain_rx_polarity_flip_physical{4.0}=0x0
phy_chain_rx_polarity_flip_physical{5.0}=0x1
phy_chain_rx_polarity_flip_physical{6.0}=0x1
phy_chain_rx_polarity_flip_physical{7.0}=0x1
phy_chain_rx_polarity_flip_physical{8.0}=0x1
phy_chain_tx_polarity_flip_physical{1.0}=0x0
phy_chain_tx_polarity_flip_physical{2.0}=0x0
phy_chain_tx_polarity_flip_physical{3.0}=0x0
phy_chain_tx_polarity_flip_physical{4.0}=0x0
phy_chain_tx_polarity_flip_physical{5.0}=0x1
phy_chain_tx_polarity_flip_physical{6.0}=0x1
phy_chain_tx_polarity_flip_physical{7.0}=0x1
phy_chain_tx_polarity_flip_physical{8.0}=0x1

#MCQ1
port_gmii_mode_17=2 #Q mode

#PHY6 U58 11x, MDC/MDIO2, PHYADDR:0x12-0x19, 0x1A
dport_map_port_17=18
dport_map_port_18=17
dport_map_port_19=20
dport_map_port_20=19
dport_map_port_21=22
dport_map_port_22=21
dport_map_port_23=24
dport_map_port_24=23
dport_map_port_25=26
dport_map_port_26=25
dport_map_port_27=28
dport_map_port_28=27
dport_map_port_29=30
dport_map_port_30=29
dport_map_port_31=32
dport_map_port_32=31
portmap_17=17:2.5
portmap_18=18:2.5
portmap_19=19:2.5
portmap_20=20:2.5
portmap_21=21:2.5
portmap_22=22:2.5
portmap_23=23:2.5
portmap_24=24:2.5
portmap_25=25:2.5
portmap_26=26:2.5
portmap_27=27:2.5
portmap_28=28:2.5
portmap_29=29:2.5
portmap_30=30:2.5
portmap_31=31:2.5
portmap_32=32:2.5
#MCQ2
port_gmii_mode_33=2 #Q mode

#PHY2 U54 x1x, MDC/MDIO0, PHYADDR:0x09-0x10, 0x11
dport_map_port_33=34
dport_map_port_34=33
dport_map_port_35=36
dport_map_port_36=35
portmap_33=33:2.5
portmap_34=34:2.5
portmap_35=35:2.5
portmap_36=36:2.5

#3x PM4x25 (3 * 4 = 12 physical ports)
#FC0

dport_map_port_49=51
dport_map_port_50=50
dport_map_port_51=49
dport_map_port_52=52
portmap_49=65:25
portmap_50=66:25
portmap_51=67:25
portmap_52=68:25
port_oversubscribe_65=1
port_oversubscribe_66=1
port_oversubscribe_67=1
port_oversubscribe_68=1
phy_chain_rx_polarity_flip_physical{65.0}=0x0
phy_chain_rx_polarity_flip_physical{66.0}=0x0
phy_chain_rx_polarity_flip_physical{67.0}=0x0
phy_chain_rx_polarity_flip_physical{68.0}=0x0
phy_chain_tx_polarity_flip_physical{65.0}=0x1
phy_chain_tx_polarity_flip_physical{66.0}=0x0
phy_chain_tx_polarity_flip_physical{67.0}=0x1
phy_chain_tx_polarity_flip_physical{68.0}=0x0
serdes_preemphasis_49=0x14410a
serdes_preemphasis_50=0x14410a
serdes_preemphasis_51=0x14410a
serdes_preemphasis_52=0x14410a

#FC1
dport_map_port_53=57
dport_map_port_54=58
dport_map_port_55=59
dport_map_port_56=60
portmap_53=69:100:4
port_oversubscribe_69=1
port_oversubscribe_70=1
port_oversubscribe_71=1
port_oversubscribe_72=1
phy_chain_rx_polarity_flip_physical{69.0}=0x0
phy_chain_rx_polarity_flip_physical{70.0}=0x0
phy_chain_rx_polarity_flip_physical{71.0}=0x0
phy_chain_rx_polarity_flip_physical{72.0}=0x0
phy_chain_tx_polarity_flip_physical{69.0}=0x1
phy_chain_tx_polarity_flip_physical{70.0}=0x0
phy_chain_tx_polarity_flip_physical{71.0}=0x0
phy_chain_tx_polarity_flip_physical{72.0}=0x0
serdes_preemphasis_lane0_53=0x144100
serdes_preemphasis_lane1_53=0x144103
serdes_preemphasis_lane2_53=0x144103
serdes_preemphasis_lane3_53=0x164103

#FC2
dport_map_port_57=53
dport_map_port_58=54
dport_map_port_59=55
dport_map_port_60=56
portmap_57=73:100:4
port_oversubscribe_73=1
port_oversubscribe_74=1
port_oversubscribe_75=1
port_oversubscribe_76=1
phy_chain_rx_polarity_flip_physical{73.0}=0x1
phy_chain_rx_polarity_flip_physical{74.0}=0x0
phy_chain_rx_polarity_flip_physical{75.0}=0x0
phy_chain_rx_polarity_flip_physical{76.0}=0x0
phy_chain_tx_polarity_flip_physical{73.0}=0x1
phy_chain_tx_polarity_flip_physical{74.0}=0x0
phy_chain_tx_polarity_flip_physical{75.0}=0x1
phy_chain_tx_polarity_flip_physical{76.0}=0x0
serdes_preemphasis_lane0_57=0x144103
serdes_preemphasis_lane1_57=0x124103
serdes_preemphasis_lane2_57=0x144103
serdes_preemphasis_lane3_57=0x164103

#4x PM4x10 (4 * 4 = 16 physical ports)
#MC0 No connection
dport_map_port_37=39
dport_map_port_38=40
dport_map_port_39=37
dport_map_port_40=38
portmap_37=49:10
portmap_38=50:10
portmap_39=51:10
portmap_40=52:10
serdes_preemphasis_37=0x033003
serdes_preemphasis_38=0x023400
serdes_preemphasis_39=0x013001
serdes_preemphasis_40=0x043000

#MC1 No connection
dport_map_port_41=43
dport_map_port_42=44
dport_map_port_43=41
dport_map_port_44=42
portmap_41=53:10
portmap_42=54:10
portmap_43=55:10
portmap_44=56:10
serdes_preemphasis_41=0x023405
serdes_preemphasis_42=0x023300
serdes_preemphasis_43=0x053700
serdes_preemphasis_44=0x003100

#MC2 No connection
dport_map_port_45=47
dport_map_port_46=48
dport_map_port_47=45
dport_map_port_48=46
portmap_45=57:10
portmap_46=58:10
portmap_47=59:10
portmap_48=60:10
serdes_preemphasis_45=0x003402
serdes_preemphasis_46=0x013301
serdes_preemphasis_47=0x073300
serdes_preemphasis_48=0x033501

#MC3 connect to CPU 10G KR

#portmap_61=61:10:m
#portmap_62=62:10:m
55 changes: 55 additions & 0 deletions device/accton/x86_64-accton_as4630_54npe-r0/Accton-AS4630-54NPE/port_config.ini
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# name lanes alias index speed autoneg
Ethernet0 2 Eth1(Port1) 1 0 on
Ethernet1 1 Eth2(Port2) 2 0 on
Ethernet2 4 Eth3(Port3) 3 0 on
Ethernet3 3 Eth4(Port4) 4 0 on
Ethernet4 6 Eth5(Port5) 5 0 on
Ethernet5 5 Eth6(Port6) 6 0 on
Ethernet6 8 Eth7(Port7) 7 0 on
Ethernet7 7 Eth8(Port8) 8 0 on
Ethernet8 10 Eth9(Port9) 9 0 on
Ethernet9 9 Eth10(Port10) 10 0 on
Ethernet10 12 Eth11(Port11) 11 0 on
Ethernet11 11 Eth12(Port12) 12 0 on
Ethernet12 14 Eth13(Port13) 13 0 on
Ethernet13 13 Eth14(Port14) 14 0 on
Ethernet14 16 Eth15(Port15) 15 0 on
Ethernet15 15 Eth16(Port16) 16 0 on
Ethernet16 18 Eth17(Port17) 17 0 on
Ethernet17 17 Eth18(Port18) 18 0 on
Ethernet18 20 Eth19(Port19) 19 0 on
Ethernet19 19 Eth20(Port20) 20 0 on
Ethernet20 22 Eth21(Port21) 21 0 on
Ethernet21 21 Eth22(Port22) 22 0 on
Ethernet22 24 Eth23(Port23) 23 0 on
Ethernet23 23 Eth24(Port24) 24 0 on
Ethernet24 26 Eth25(Port25) 25 0 on
Ethernet25 25 Eth26(Port26) 26 0 on
Ethernet26 28 Eth27(Port27) 27 0 on
Ethernet27 27 Eth28(Port28) 28 0 on
Ethernet28 30 Eth29(Port29) 29 0 on
Ethernet29 29 Eth30(Port30) 30 0 on
Ethernet30 32 Eth31(Port31) 31 0 on
Ethernet31 31 Eth32(Port32) 32 0 on
Ethernet32 34 Eth33(Port33) 33 0 on
Ethernet33 33 Eth34(Port34) 34 0 on
Ethernet34 36 Eth35(Port35) 35 0 on
Ethernet35 35 Eth36(Port36) 36 0 on
Ethernet36 51 Eth37(Port37) 37 0 on
Ethernet37 52 Eth38(Port38) 38 0 on
Ethernet38 49 Eth39(Port39) 39 0 on
Ethernet39 50 Eth40(Port40) 40 0 on
Ethernet40 55 Eth41(Port41) 41 0 on
Ethernet41 56 Eth42(Port42) 42 0 on
Ethernet42 53 Eth43(Port43) 43 0 on
Ethernet43 54 Eth44(Port44) 44 0 on
Ethernet44 59 Eth45(Port45) 45 0 on
Ethernet45 60 Eth46(Port46) 46 0 on
Ethernet46 57 Eth47(Port47) 47 0 on
Ethernet47 58 Eth48(Port48) 48 0 on
Ethernet48 67 Eth49(Port49) 49 25000 off
Ethernet49 66 Eth50(Port50) 50 25000 off
Ethernet50 65 Eth51(Port51) 51 25000 off
Ethernet51 68 Eth52(Port52) 52 25000 off
Ethernet52 73,74,75,76 Eth53(Port53) 53 100000 off
Ethernet56 69,70,71,72 Eth54(Port54) 54 100000 off
1 change: 1 addition & 0 deletions device/accton/x86_64-accton_as4630_54npe-r0/Accton-AS4630-54NPE/sai.profile
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SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/hx5-as4630-36x2p5G+12x10G+4x25G+2x100G.bcm
Binary file added device/accton/x86_64-accton_as4630_54npe-r0/custom_led.bin
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1 change: 1 addition & 0 deletions device/accton/x86_64-accton_as4630_54npe-r0/default_sku
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Accton-AS4630-54NPE t1
3 changes: 3 additions & 0 deletions device/accton/x86_64-accton_as4630_54npe-r0/led_proc_init.soc
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#m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin
led start
led auto on