Merge pull request #80 from tyshyu/main

Refine Section 3.5.4, update version number, fix #81

Author: paul-andes

appendix_a2.adoc

@@ -14,9 +14,9 @@ Placing IOPMPs in parallel can seamlessly enhance the support for an increased n
 
 ====
 
-[#APPENDIX_A2_2]
 *A2.2 Cascading IOPMP*
 
+[#RRID_TRANSLATION]
 Cascading multiple IOPMPs allows a transaction to traverse through more than one IOPMP. Each time a transaction goes through an IOPMP, it is tagged a new RRID until it reaches the final IOPMP. This new RRID represents that the transaction has been checked by a specific IOPMP. Subsequent IOPMPs could deem the transaction trustworthy and forward it to their initiator port without further checks, or check it in a higher level view, e.g., a subsystem view. An IOPMP with the above feature of tagging a new RRID is referred to as an IOPMP gateway. Its *HWCFG0.rrid_transl_en* should be set to 1, and *HWCFG2.rrid_transl* is used to store the RRID.  *HWCFG0.rrid_transl_prog* indicates whether *HWCFG2.rrid_transl* is programmable or not. To lock *rrid_transl*, write 1 to *rrid_transl_prog*, which clears *rrid_transl_prog* and is sticky to 0.
 
 [NOTE]

chapter3.adoc

@@ -105,7 +105,7 @@ The term 'lock' refers to a hardware feature that renders one or more fields or
 ==== SRCMD Table Protection
 In Format 0, every *SRCMD_EN(_s_)* register has a bit *l* at bit 0, which is used to lock registers *SRCMD_EN(_s_)*, and *SRCMD_ENH(_s_)* if any.
 
-The two fields *MDLCK.md* and *MDLCKH.mdh* have 63 bits together. Every bit is used to lock the association bits with a memory domain in the SRCMD Table. In Format 0, for MD 0 ≤ _m_ ≤ 30, *MDLCK.md[_m_]* locks *SRCMD(_s_).md[_m_]* for all existing RRID _s_. In Format 1, there is no *MDLCK*. In Format 2, SRCMD Table can be prelocked fully or partially based on presets of *MDLCK.md*. For MD 31 ≤ _m_ ≤ 62, one should use *MDLCKH.mdh* to lock corresponding bits.
+The two fields *MDLCK.md* and *MDLCKH.mdh* have 63 bits together. Every bit is used to lock the association bits with a memory domain in the SRCMD Table. In Format 0, for MD 0 ≤ _m_ ≤ 30, *MDLCK.md[_m_]* locks *SRCMD(_s_).md[_m_]* for all existing RRID _s_. In Format 1, there is no *MDLCK*. In Format 2, *MDLCK.md[_m_]* locks both *SRCMD_PERM(_m_)* and *SRCMD_PERMH(_m_)*. For MD 31 ≤ _m_ ≤ 62, one should use *MDLCKH.mdh* to lock corresponding bits.
 
 Bit *MDLCK.l* is a sticky to 1 and indicates if *MDLCK* and *MDLCKH* are locked.
 
@@ -133,15 +133,15 @@ If *MDCFG(_m_)* is locked for MD _m_, while *MDCFG(_m_-1)* is not locked, it cou
 IOPMP entry protection is also related to the other IOPMP entries belonging to the same memory domain. For a MD, locked entries should be placed in the higher priority. Otherwise, when the secure monitor is compromised, one unlocked entry in higher priority can overwrite all the other locked or non-locked entries in lower priority.  A register *ENTRYLCK* is defined to indicate the number of nonprogrammable entries. *ENTRYLCK* register has two fields: *ENTRYLCK.l* and *ENTRYLCK.f*. Any IOPMP entry with index _i_ < *ENTRYLCK.f* is not programmable. *ENTRYLCK.f* is incremental-only. Any smaller value can not be written into it. Besides, *ENTRYLCK.l* is the lock to *ENTRYLCK.f* and itself. If *ENTRYLCK* is hardwired, *ENTRYLCK.l* should be wired to 1.
 
 [#SECTION_3_5_4]
-==== Summary of Protection
+==== Summary of Table, Register, and Field Locks
 
-The following sections specify the all locks for IOPMP tables, arrays, and registers:
+Almost all programmable tables, registers, and fields have a corresponding lock mechanism that prevents updates until the IOPMP is reset. The following is a summary.
 
 * <<#SECTION_3_5_1, SRCMD Table Protection>> - locks for the SRCMD Table.
 * <<#SECTION_3_5_2, MDCFG Table Protection>> - locks for the MDCFG Table.
 * <<#SECTION_3_5_3, Entry Protection>> - locks for the IOPMP entry array.
 * <<#SECTION_2_6, Priority and Matching Logic>> - *HWCFG0.prient_prog* locks *HWCFG2.prio_entry*.
-* <<#APPENDIX_A2_2, Cascading IOPMP>> - *HWCFG0.rrid_transl_prog* locks *HWCFG2.rrid_transl*.
+* <<#RRID_TRANSLATION, RRID Translation>> - *HWCFG0.rrid_transl_prog* locks *HWCFG2.rrid_transl*.
 * <<#HWCFG0, HWCFG0>> - *HWCFG0.enable* locks *HWCFG0.md_entry_num*.
 * <<#ERR_CFG, ERR_CFG>> - *ERR_CFG.l* locks *ERR_CFG*, *ERR_MSIADDR*, and *ERR_MSIADDRH*.
 
@@ -153,5 +153,5 @@ The registers *MDSTALL*, *MDSTALLH*, *RRIDSCP*, and error record registers do no
 [#SECTION_3_6]
 === Prelocked Configurations
 Prelocked configurations in the specification mean the fields or registers are locked right after reset. In practice, they could be hardwired and/or implemented by read-only memory. Every lock mechanism in this chapter can be optionally pre-locked.
-The non-zero reset value of *MDCFGLCK.f* reflects the pre-locked *MDCFG(_j_)*, where _j_< *MDCFGLCK.f*. The non-zero reset value of *ENTRYLCK.f* reflects the existing pre-locked entries. *SRCMD_EN(H)* can have prelocked bits fully or partially based on presets of *MDLCK.md* and *SRCMD_EN.l*. Similarly, *SRCMD_PERM(H)* also can have prelocked bits fully or partially based on presets of *MDLCK.md*.
+The non-zero reset value of *MDCFGLCK.f* reflects the pre-locked *MDCFG(_j_)*, where _j_< *MDCFGLCK.f*. The non-zero reset value of *ENTRYLCK.f* reflects the existing pre-locked entries. *SRCMD_EN(H)* can have prelocked bits fully or partially based on presets of *MDLCK.md* and *SRCMD_EN.l*. In Format 2, the SRCMD Table can be prelocked fully or partially based on the presets of *MDLCK.md*.
 The rest of the lock bits can be preset, too. Please refer <<#SECTION_3_5_4, Summary of Protection>> for all lock bits.

iopmp.adoc

@@ -1,8 +1,8 @@
 [[header]]
 :description: RISC-V IOPMP Architecture Specification
 :company: RISC-V.org
-:revdate: April, 2025
-:revnumber: 0.6
+:revdate: June, 2025
+:revnumber: 0.6.1
 :revremark: This document is in development. Assume everything can change. See http://riscv.org/spec-state for details.
 :url-riscv: http://riscv.org
 :doctype: book