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[RTG] Add comment op #8396

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2 changes: 1 addition & 1 deletion frontends/PyRTG/src/pyrtg/__init__.py
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@

from . import tests
from . import core
from .tests import test
from .tests import test, embed_comment
from .labels import Label
from .rtg import rtg
from .rtgtest import rtgtest
Expand Down
8 changes: 8 additions & 0 deletions frontends/PyRTG/src/pyrtg/tests.py
Original file line number Diff line number Diff line change
Expand Up @@ -44,3 +44,11 @@ def wrapper(func):
return Test(func, list(args))

return wrapper


def embed_comment(comment: str) -> None:
"""
Embeds a comment in the instruction stream.
"""

rtg.CommentOp(comment)
10 changes: 9 additions & 1 deletion frontends/PyRTG/test/basic.py
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@
# RUN: %rtgtool% %s --seed=0 --output-format=elaborated | FileCheck %s --check-prefix=ELABORATED
# RUN: %rtgtool% %s --seed=0 -o %t --output-format=asm && FileCheck %s --input-file=%t --check-prefix=ASM

from pyrtg import test, sequence, target, entry, rtg, Label, Set, Integer, Bag, rtgtest, Immediate, IntegerRegister, Array, Bool, MemoryBlock, Memory, Tuple
from pyrtg import test, sequence, target, entry, rtg, Label, Set, Integer, Bag, rtgtest, Immediate, IntegerRegister, Array, Bool, MemoryBlock, Memory, Tuple, embed_comment

# MLIR-LABEL: rtg.target @Singleton : !rtg.dict<>
# MLIR-NEXT: }
Expand Down Expand Up @@ -225,6 +225,8 @@ def test1_args(set: Set):
# MLIR-NEXT: [[RAND4:%.+]] = rtg.randomize_sequence [[SEQ1]]
# MLIR-NEXT: rtg.embed_sequence [[RAND4]]

# MLIR-NEXT: rtg.comment "this is a comment"

# MLIR-NEXT: }

# ELABORATED-LABEL: rtg.test @test2_labels
Expand Down Expand Up @@ -253,6 +255,8 @@ def test1_args(set: Set):
# ELABORATED-NEXT: [[L5:%.+]] = rtg.label_decl "s1"
# ELABORATED-NEXT: rtg.label local [[L5]]

# ELABORATED-NEXT: rtg.comment "this is a comment"

# ELABORATED-NEXT: }

# ASM-LABEL: Begin of test2_labels
Expand All @@ -277,6 +281,8 @@ def test1_args(set: Set):

# ASM-NEXT: s1:

# ASM-NEXT: # this is a comment

# ASM-EMPTY:
# ASM: End of test2_labels

Expand Down Expand Up @@ -326,6 +332,8 @@ def test2_labels():

seq1()

embed_comment("this is a comment")


# MLIR-LABEL: rtg.test @test3_registers_and_immediates()
# MLIR-NEXT: [[IMM32:%.+]] = rtg.constant #rtg.isa.immediate<32, 32>
Expand Down
10 changes: 10 additions & 0 deletions include/circt/Dialect/RTG/IR/RTGOps.td
Original file line number Diff line number Diff line change
Expand Up @@ -641,6 +641,16 @@ def RandomNumberInRangeOp : RTGOp<"random_number_in_range", []> {
let assemblyFormat = "` ` `[` $lowerBound `,` $upperBound `)` attr-dict";
}

//===- Misc Operations ----------------------------------------------------===//

def CommentOp : RTGOp<"comment", []> {
let summary = "emit a comment in instruction stream";

let arguments = (ins StrAttr:$comment);

let assemblyFormat = "$comment attr-dict";
}

//===- ISA Register Handling Operations -----------------------------------===//

def FixedRegisterOp : RTGOp<"fixed_reg", [
Expand Down
5 changes: 4 additions & 1 deletion include/circt/Dialect/RTG/IR/RTGVisitors.h
Original file line number Diff line number Diff line change
Expand Up @@ -62,7 +62,9 @@ class RTGOpVisitor {
// Memories
MemoryAllocOp, MemoryBaseAddressOp, MemorySizeOp,
// Memory Blocks
MemoryBlockDeclareOp>([&](auto expr) -> ResultType {
MemoryBlockDeclareOp,
// Misc ops
CommentOp>([&](auto expr) -> ResultType {
return thisCast->visitOp(expr, args...);
})
.Default([&](auto expr) -> ResultType {
Expand Down Expand Up @@ -123,6 +125,7 @@ class RTGOpVisitor {
HANDLE(ArraySizeOp, Unhandled);
HANDLE(TupleCreateOp, Unhandled);
HANDLE(TupleExtractOp, Unhandled);
HANDLE(CommentOp, Unhandled);
HANDLE(LabelDeclOp, Unhandled);
HANDLE(LabelUniqueDeclOp, Unhandled);
HANDLE(LabelOp, Unhandled);
Expand Down
2 changes: 2 additions & 0 deletions lib/Dialect/RTG/Transforms/ElaborationPass.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1665,6 +1665,8 @@ class Elaborator : public RTGOpVisitor<Elaborator, FailureOr<DeletionKind>> {
return DeletionKind::Keep;
}

FailureOr<DeletionKind> visitOp(CommentOp op) { return DeletionKind::Keep; }

FailureOr<DeletionKind> visitOp(scf::IfOp op) {
bool cond = get<bool>(op.getCondition());
auto &toElaborate = cond ? op.getThenRegion() : op.getElseRegion();
Expand Down
18 changes: 12 additions & 6 deletions lib/Dialect/RTG/Transforms/EmitRTGISAAssemblyPass.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -104,6 +104,11 @@ class Emitter {
return success();
}

LogicalResult emit(CommentOp op) {
os << llvm::indent(4) << "# " << op.getComment() << "\n";
return success();
}

LogicalResult emitTest(rtg::TestOp test, bool emitHeaderFooter = false) {
if (emitHeaderFooter)
os << "# Begin of " << test.getSymName() << "\n\n";
Expand All @@ -125,12 +130,13 @@ class Emitter {
continue;
}

auto res = TypeSwitch<Operation *, LogicalResult>(&op)
.Case<InstructionOpInterface, LabelDeclOp, LabelOp>(
[&](auto op) { return emit(op); })
.Default([](auto op) {
return op->emitError("emitter unknown RTG operation");
});
auto res =
TypeSwitch<Operation *, LogicalResult>(&op)
.Case<InstructionOpInterface, LabelDeclOp, LabelOp, CommentOp>(
[&](auto op) { return emit(op); })
.Default([](auto op) {
return op->emitError("emitter unknown RTG operation");
});

if (failed(res))
return failure();
Expand Down
3 changes: 3 additions & 0 deletions test/Dialect/RTG/IR/basic.mlir
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,9 @@ rtg.test @constants() {
// CHECK-NEXT: rtg.isa.int_to_immediate [[V0]] : !rtg.isa.immediate<32>
%1 = index.constant 5
%2 = rtg.isa.int_to_immediate %1 : !rtg.isa.immediate<32>

// CHECK-NEXT: rtg.comment "this is a comment"
rtg.comment "this is a comment"
}

// CHECK-LABEL: rtg.sequence @ranomizedSequenceType
Expand Down
6 changes: 6 additions & 0 deletions test/Dialect/RTG/Transform/elaboration.mlir
Original file line number Diff line number Diff line change
Expand Up @@ -728,6 +728,12 @@ rtg.test @subtypeMatching(b = %b: index) {
func.call @dummy2(%b) : (index) -> ()
}

// CHECK-LABEL: rtg.test @comments
rtg.test @comments(singleton = %none: index) {
// CHECK-NEXT: rtg.comment "this is a comment"
rtg.comment "this is a comment"
}

// -----

rtg.target @singletonTarget : !rtg.dict<singleton: index> {
Expand Down
4 changes: 4 additions & 0 deletions test/Dialect/RTG/Transform/emit-rtg-isa-assembly.mlir
Original file line number Diff line number Diff line change
Expand Up @@ -214,6 +214,10 @@ rtg.test @test0() {
// CHECK-NEXT: # srai ra, s0, 31
// CHECK-NEXT: .word 0x41F45093
rtgtest.rv32i.srai %rd, %rs, %imm5

// CHECK-ALLOWED-NEXT: # this is a comment
// CHECK-NEXT: # this is a comment
rtg.comment "this is a comment"
}

// CHECK-EMPTY:
Expand Down