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[RISC-V] Add more gcdump and gcinfo code. #94219
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Tagging subscribers to this area: @tommcdon Issue DetailsPart of diagnostics related changes (that should be synced with runtime) (SOS command CC @clamp03 @wscho77 @HJLeee @JongHeonChoi @t-mustafin @gbalykov
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Thank you for your hard work. Please check my comments.
src/coreclr/gcinfo/gcinfodumper.cpp
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#elif defined(TARGET_RISCV64) | ||
assert(!"unimplemented on RISCV64 yet"); | ||
BYTE* pContext = (BYTE*)pRD->pCurrentContext; |
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Is it implemented or unimplemented? I don't think we need to keep both codes for the future. Isn't it better to remove one? Please let me know your opinion.
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Note, this is unimplemented block (and will not be implemented in this PR for sure). We stay with previous logic - assert in debug build and compile default code in release build. I can't remove any of this lines since this will broke previous logic - will not assert in debug or will not compile code in #else
block.
src/coreclr/gcinfo/gcinfodumper.cpp
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#elif defined(TARGET_RISCV64) | ||
assert(!"unimplemented on RISCV64 yet"); | ||
pReg = (SIZE_T*)(pContext + rgRegisters[iReg].cbContextOffset); |
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Please check and remove one.
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Note, this is unimplemented block (and will not be implemented in this PR for sure). We stay with previous logic - assert in debug build and compile default code in release build. I can't remove any of this lines since this will broke previous logic - will not assert in debug or will not compile code in #else
block.
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Sorry. I cannot understand well. If the block is unimplemented, I don't understand why we need those default codes for release build? And pReg = (SIZE_T*)(pContext + rgRegisters[iReg].cbContextOffset);
is necessary for only Release build? Could you explain for me?
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We have 2 situation here: 1) without some of this code blocks you can't compile, since this blocks provide local variables definitions; 2) I can't guarantee that in release build, code will avoid "infinity loop" or something like that, in case we don't change some variables, that changed by initial logic;
This mean, in case someone will use diagnostics SOS command gcinfo
(after this code will be synced with diagnostics repo) it should not hangs or sigsegv in release build.
src/coreclr/gcinfo/gcinfodumper.cpp
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#elif defined(TARGET_RISCV64) | ||
assert(!"unimplemented on RISCV64 yet"); | ||
base = GC_SP_REL; |
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Please check and remove one.
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Note, this is unimplemented block (and will not be implemented in this PR for sure). By default, I use same code here as arm/loongarch, since we will have same logic as arch with volatile registers, but could switch to default from #else
block for sure.
src/coreclr/gcinfo/gcinfodumper.cpp
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#elif defined(TARGET_RISCV64) | ||
assert(!"unimplemented on RISCV64 yet"); | ||
pContext = (BYTE*)pRD->pCallerContext; |
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Please check and remove one.
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Note, this is unimplemented block (and will not be implemented in this PR for sure). We stay with previous logic - assert in debug build and compile default code in release build. I can't remove any of this lines since this will broke previous logic - will not assert in debug or will not compile code in #else block.
FILL_REGS(pCurrentContext->R0, 33); | ||
FILL_REGS(pCallerContext->R0, 33); |
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I think it is 32 because you removed PC. And please do not force-push. I want to check the number is updated when you remove PC. However, I cannot see your previous commits. Please add commits not force-push. Thank you.
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I want to check the number is updated when you remove PC.
We stay with PC here since all other architectures have this logic.
Note, I removed PC only from switch
in another source, not really connected to this code logic.
However, I cannot see your previous commits.
The only changes I did is:
https://github.com/dotnet/runtime/compare/ebfbce12b56e40f36c197729700479e2f276eebb..ea435f756d5bf3dc01ded976da44cb00c5ac91e7
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I see. Thank you!
@jkotas Could you take a look at this PR? Thank you. |
How well does it work with so many TODOs remaining? |
#endif | ||
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#if defined(TARGET_ARM) || defined(TARGET_ARM64) | ||
BYTE* pContext = (BYTE*)&(pRD->volatileCurrContextPointers); | ||
#elif defined(TARGET_LOONGARCH64) | ||
assert(!"unimplemented on LOONGARCH yet"); | ||
BYTE* pContext = (BYTE*)pRD->pCurrentContext; | ||
#elif defined(TARGET_RISCV64) | ||
assert(!"unimplemented on RISCV64 yet"); | ||
// TODO implement risc-v code, that should care about volatile registers (same as arm/arm64 architectures) |
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Add || defined(TARGET_RISCV64)
to the ARM / ARM64 case above?
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I am not sure we could change pointer to another size structure here and after this operate with offsets for another structure size in code below.
In case of release build it don't show or show wrong (at least I think so) related part of output (last part with registers related block). |
Correction |
Part of diagnostics related changes (that should be synced with runtime) (SOS command
gcinfo
, ...).CC @clamp03 @wscho77 @HJLeee @JongHeonChoi @t-mustafin @gbalykov