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[release/9.0-staging] Use minipal_getcpufeatures to detect for AVX (#113032) #113489

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Merged
merged 1 commit into from
Mar 18, 2025
Merged

[release/9.0-staging] Use minipal_getcpufeatures to detect for AVX (#113032) #113489

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4 changes: 4 additions & 0 deletions src/coreclr/gc/CMakeLists.txt
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Original file line number Diff line number Diff line change
Expand Up @@ -93,6 +93,10 @@ if(CLR_CMAKE_TARGET_ARCH_AMD64)
list(APPEND GC_LINK_LIBRARIES
gc_vxsort
)
list(APPEND GC_SOURCES
${CLR_SRC_NATIVE_DIR}/minipal/cpufeatures.c
)
include(${CLR_SRC_NATIVE_DIR}/minipal/configure.cmake)
endif(CLR_CMAKE_TARGET_ARCH_AMD64)


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1 change: 1 addition & 0 deletions src/coreclr/gc/sample/CMakeLists.txt
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Expand Up @@ -36,6 +36,7 @@ if (CLR_CMAKE_TARGET_ARCH_AMD64 AND CLR_CMAKE_TARGET_WIN32)
../vxsort/smallsort/bitonic_sort.AVX512.int64_t.generated.cpp
../vxsort/smallsort/bitonic_sort.AVX512.int32_t.generated.cpp
../vxsort/smallsort/avx2_load_mask_tables.cpp
${CLR_SRC_NATIVE_DIR}/minipal/cpufeatures.c
)
endif (CLR_CMAKE_TARGET_ARCH_AMD64 AND CLR_CMAKE_TARGET_WIN32)

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81 changes: 5 additions & 76 deletions src/coreclr/gc/vxsort/isa_detection.cpp
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Expand Up @@ -2,92 +2,23 @@
// The .NET Foundation licenses this file to you under the MIT license.

#include "common.h"

#ifdef TARGET_WINDOWS
#include <intrin.h>
#include <windows.h>
#endif

#include "do_vxsort.h"

#include <minipal/cpufeatures.h>

enum class SupportedISA
{
None = 0,
AVX2 = 1 << (int)InstructionSet::AVX2,
AVX512F = 1 << (int)InstructionSet::AVX512F
};

#if defined(TARGET_AMD64) && defined(TARGET_WINDOWS)

SupportedISA DetermineSupportedISA()
{
// register definitions to make the following code more readable
enum reg
{
EAX = 0,
EBX = 1,
ECX = 2,
EDX = 3,
COUNT = 4
};

// bit definitions to make code more readable
enum bits
{
OCXSAVE = 1<<27,
AVX = 1<<28,
AVX2 = 1<< 5,
AVX512F = 1<<16,
AVX512DQ = 1<<17,
};
int reg[COUNT];

__cpuid(reg, 0);
if (reg[EAX] < 7)
return SupportedISA::None;

__cpuid(reg, 1);

// both AVX and OCXSAVE feature flags must be enabled
if ((reg[ECX] & (OCXSAVE|AVX)) != (OCXSAVE | AVX))
return SupportedISA::None;

// get xcr0 register
DWORD64 xcr0 = _xgetbv(0);

// get OS XState info
DWORD64 FeatureMask = GetEnabledXStateFeatures();

// get processor extended feature flag info
__cpuidex(reg, 7, 0);

// check if all of AVX2, AVX512F and AVX512DQ are supported by both processor and OS
if ((reg[EBX] & (AVX2 | AVX512F | AVX512DQ)) == (AVX2 | AVX512F | AVX512DQ) &&
(xcr0 & 0xe6) == 0xe6 &&
(FeatureMask & (XSTATE_MASK_AVX | XSTATE_MASK_AVX512)) == (XSTATE_MASK_AVX | XSTATE_MASK_AVX512))
{
return (SupportedISA)((int)SupportedISA::AVX2 | (int)SupportedISA::AVX512F);
}

// check if AVX2 is supported by both processor and OS
if ((reg[EBX] & AVX2) &&
(xcr0 & 0x06) == 0x06 &&
(FeatureMask & XSTATE_MASK_AVX) == XSTATE_MASK_AVX)
{
return SupportedISA::AVX2;
}

return SupportedISA::None;
}

#elif defined(TARGET_UNIX)

SupportedISA DetermineSupportedISA()
{
__builtin_cpu_init();
if (__builtin_cpu_supports("avx2"))
int cpuFeatures = minipal_getcpufeatures();
if ((cpuFeatures & XArchIntrinsicConstants_Avx2) != 0)
{
if (__builtin_cpu_supports("avx512f"))
if ((cpuFeatures & XArchIntrinsicConstants_Avx512) != 0)
return (SupportedISA)((int)SupportedISA::AVX2 | (int)SupportedISA::AVX512F);
else
return SupportedISA::AVX2;
Expand All @@ -98,8 +29,6 @@ SupportedISA DetermineSupportedISA()
}
}

#endif // defined(TARGET_UNIX)

static bool s_initialized;
static SupportedISA s_supportedISA;

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