Junior EEE Student at Middle East Technical University
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Siemens
- Turkey
- in/mehmetbasturk
Pinned Loading
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ALU
ALU Publicimplementing an Arithmetic Logic Unit (ALU) using Verilog. The ALU consists of two submodules: a Logic Unit (LU) and an Arithmetic Unit (AU).
Verilog
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imbalanceCostAnalysis_EPIAS
imbalanceCostAnalysis_EPIAS PublicImbalance cost analysis on the 4 hypothetical plants, using day-ahead and intraday data in energy stock market EPİAŞ, Turkish version of Nord Pool and EPEX.
Python
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video2text
video2text Publicconvert youtube videos into text file for free, no need to use Happy Scribe, Otter.ai, Descript, VEED.io
Python
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