Skip to content

Commit 716cdc7

Browse files
rick-aristaarun1355492
rick-arista
authored and
arun1355492
committed
Fix QoS configuations for Quicksilver (sonic-net#19315)
Adds egress_lossy_pool and fixes SAI error caused by TH5 default config Why I did it This change is needed to fix a SAI crash on boot. These values zero out the reserved buffer space that by default would cause the pools defined in config_db.json to fail to create due to insufficient remaining room. How I did it The buffer pool values were chosen by simply dividing the total available MMU memory into 3 pools. How to verify it Without this change device fails to boot correctly.
1 parent 8d56036 commit 716cdc7

File tree

10 files changed

+602
-28
lines changed

10 files changed

+602
-28
lines changed

‎device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/th5-a7060x6-64de.config.bcm

+92
Original file line numberDiff line numberDiff line change
@@ -1926,3 +1926,95 @@ device:
19261926
DEVICE_CONFIG:
19271927
AUTOLOAD_BOARD_SETTINGS: 0
19281928
...
1929+
## Baseline
1930+
---
1931+
device:
1932+
0:
1933+
TM_THD_CONFIG:
1934+
SKIP_BUFFER_RESERVATION: 1
1935+
THRESHOLD_MODE: LOSSY_AND_LOSSLESS
1936+
...
1937+
---
1938+
device:
1939+
0:
1940+
TM_ING_THD_HEADROOM_POOL:
1941+
?
1942+
BUFFER_POOL: [[0,1]]
1943+
TM_HEADROOM_POOL_ID: [[0,3]]
1944+
:
1945+
LIMIT_CELLS: 0
1946+
1947+
TM_ING_THD_SERVICE_POOL:
1948+
?
1949+
BUFFER_POOL: [[0,1]]
1950+
TM_ING_SERVICE_POOL_ID: [[0,3]]
1951+
:
1952+
SHARED_LIMIT_CELLS: 0
1953+
SHARED_RESUME_OFFSET_CELLS: 0
1954+
COLOR_SPECIFIC_LIMITS: 0
1955+
1956+
TM_EGR_THD_SERVICE_POOL:
1957+
?
1958+
BUFFER_POOL: [[0,1]]
1959+
TM_EGR_SERVICE_POOL_ID: [[0,3]]
1960+
:
1961+
SHARED_LIMIT_CELLS: 0
1962+
SHARED_RESUME_LIMIT_CELLS: 0
1963+
COLOR_SPECIFIC_LIMITS: 0
1964+
YELLOW_SHARED_LIMIT_CELLS: 0
1965+
YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
1966+
RED_SHARED_LIMIT_CELLS: 0
1967+
RED_SHARED_RESUME_LIMIT_CELLS: 0
1968+
1969+
TM_THD_MC_EGR_SERVICE_POOL:
1970+
?
1971+
BUFFER_POOL: [[0,1]]
1972+
TM_EGR_SERVICE_POOL_ID: [[0,3]]
1973+
:
1974+
SHARED_LIMIT_CELLS: 0
1975+
SHARED_RESUME_LIMIT_CELLS: 0
1976+
COLOR_SPECIFIC_LIMITS: 0
1977+
YELLOW_SHARED_LIMIT_CELLS: 0
1978+
YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
1979+
RED_SHARED_LIMIT_CELLS: 0
1980+
RED_SHARED_RESUME_LIMIT_CELLS: 0
1981+
1982+
TM_ING_PORT_PRI_GRP:
1983+
?
1984+
PORT_ID: [[1, 8],
1985+
[11, 18],
1986+
[22, 29],
1987+
[33, 40],
1988+
[44, 51],
1989+
[55, 62],
1990+
[66, 73],
1991+
[77, 84],
1992+
[88, 95],
1993+
[99, 106],
1994+
[110, 117],
1995+
[121, 128],
1996+
[132, 139],
1997+
[143, 150],
1998+
[154, 161],
1999+
[165, 172],
2000+
[176, 183],
2001+
[187, 194],
2002+
[198, 205],
2003+
[209, 216],
2004+
[220, 227],
2005+
[231, 238],
2006+
[242, 249],
2007+
[253, 260],
2008+
[264, 271],
2009+
[275, 282],
2010+
[286, 293],
2011+
[297, 304],
2012+
[308, 315],
2013+
[319, 326],
2014+
[330, 337],
2015+
[341, 348]]
2016+
TM_PRI_GRP_ID: 3
2017+
:
2018+
PFC: 1
2019+
LOSSLESS: 1
2020+
...

‎device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/buffer_ports.j2

+6
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,6 @@
1+
{%- macro generate_port_lists(PORT_ALL) %}
2+
{# Generate list of ports #}
3+
{%- for port_idx in range(0, 512, 8) %}
4+
{%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %}
5+
{%- endfor %}
6+
{%- endmacro %}

‎device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/buffer_ports.j2

+6
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,6 @@
1+
{%- macro generate_port_lists(PORT_ALL) %}
2+
{# Generate list of ports #}
3+
{%- for port_idx in range(0, 512, 8) %}
4+
{%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %}
5+
{%- endfor %}
6+
{%- endmacro %}

‎device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/th5-a7060x6-64de.config.bcm

+92
Original file line numberDiff line numberDiff line change
@@ -1158,3 +1158,95 @@ device:
11581158
DEVICE_CONFIG:
11591159
AUTOLOAD_BOARD_SETTINGS: 0
11601160
...
1161+
## Baseline
1162+
---
1163+
device:
1164+
0:
1165+
TM_THD_CONFIG:
1166+
SKIP_BUFFER_RESERVATION: 1
1167+
THRESHOLD_MODE: LOSSY_AND_LOSSLESS
1168+
...
1169+
---
1170+
device:
1171+
0:
1172+
TM_ING_THD_HEADROOM_POOL:
1173+
?
1174+
BUFFER_POOL: [[0,1]]
1175+
TM_HEADROOM_POOL_ID: [[0,3]]
1176+
:
1177+
LIMIT_CELLS: 0
1178+
1179+
TM_ING_THD_SERVICE_POOL:
1180+
?
1181+
BUFFER_POOL: [[0,1]]
1182+
TM_ING_SERVICE_POOL_ID: [[0,3]]
1183+
:
1184+
SHARED_LIMIT_CELLS: 0
1185+
SHARED_RESUME_OFFSET_CELLS: 0
1186+
COLOR_SPECIFIC_LIMITS: 0
1187+
1188+
TM_EGR_THD_SERVICE_POOL:
1189+
?
1190+
BUFFER_POOL: [[0,1]]
1191+
TM_EGR_SERVICE_POOL_ID: [[0,3]]
1192+
:
1193+
SHARED_LIMIT_CELLS: 0
1194+
SHARED_RESUME_LIMIT_CELLS: 0
1195+
COLOR_SPECIFIC_LIMITS: 0
1196+
YELLOW_SHARED_LIMIT_CELLS: 0
1197+
YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
1198+
RED_SHARED_LIMIT_CELLS: 0
1199+
RED_SHARED_RESUME_LIMIT_CELLS: 0
1200+
1201+
TM_THD_MC_EGR_SERVICE_POOL:
1202+
?
1203+
BUFFER_POOL: [[0,1]]
1204+
TM_EGR_SERVICE_POOL_ID: [[0,3]]
1205+
:
1206+
SHARED_LIMIT_CELLS: 0
1207+
SHARED_RESUME_LIMIT_CELLS: 0
1208+
COLOR_SPECIFIC_LIMITS: 0
1209+
YELLOW_SHARED_LIMIT_CELLS: 0
1210+
YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
1211+
RED_SHARED_LIMIT_CELLS: 0
1212+
RED_SHARED_RESUME_LIMIT_CELLS: 0
1213+
1214+
TM_ING_PORT_PRI_GRP:
1215+
?
1216+
PORT_ID: [[1, 2],
1217+
[11, 12],
1218+
[22, 23],
1219+
[33, 34],
1220+
[44, 45],
1221+
[55, 56],
1222+
[66, 67],
1223+
[77, 78],
1224+
[88, 89],
1225+
[99, 100],
1226+
[110, 111],
1227+
[121, 122],
1228+
[132, 133],
1229+
[143, 144],
1230+
[154, 155],
1231+
[165, 166],
1232+
[176, 177],
1233+
[187, 188],
1234+
[198, 199],
1235+
[209, 210],
1236+
[220, 221],
1237+
[231, 232],
1238+
[242, 243],
1239+
[253, 254],
1240+
[264, 265],
1241+
[275, 276],
1242+
[286, 287],
1243+
[297, 298],
1244+
[308, 309],
1245+
[319, 320],
1246+
[330, 331],
1247+
[341, 342]]
1248+
TM_PRI_GRP_ID: 3
1249+
:
1250+
PFC: 1
1251+
LOSSLESS: 1
1252+
...

‎device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/th5-a7060x6-64pe.config.bcm

+92
Original file line numberDiff line numberDiff line change
@@ -1414,3 +1414,95 @@ device:
14141414
DEVICE_CONFIG:
14151415
AUTOLOAD_BOARD_SETTINGS: 0
14161416
...
1417+
## Baseline
1418+
---
1419+
device:
1420+
0:
1421+
TM_THD_CONFIG:
1422+
SKIP_BUFFER_RESERVATION: 1
1423+
THRESHOLD_MODE: LOSSY_AND_LOSSLESS
1424+
...
1425+
---
1426+
device:
1427+
0:
1428+
TM_ING_THD_HEADROOM_POOL:
1429+
?
1430+
BUFFER_POOL: [[0,1]]
1431+
TM_HEADROOM_POOL_ID: [[0,3]]
1432+
:
1433+
LIMIT_CELLS: 0
1434+
1435+
TM_ING_THD_SERVICE_POOL:
1436+
?
1437+
BUFFER_POOL: [[0,1]]
1438+
TM_ING_SERVICE_POOL_ID: [[0,3]]
1439+
:
1440+
SHARED_LIMIT_CELLS: 0
1441+
SHARED_RESUME_OFFSET_CELLS: 0
1442+
COLOR_SPECIFIC_LIMITS: 0
1443+
1444+
TM_EGR_THD_SERVICE_POOL:
1445+
?
1446+
BUFFER_POOL: [[0,1]]
1447+
TM_EGR_SERVICE_POOL_ID: [[0,3]]
1448+
:
1449+
SHARED_LIMIT_CELLS: 0
1450+
SHARED_RESUME_LIMIT_CELLS: 0
1451+
COLOR_SPECIFIC_LIMITS: 0
1452+
YELLOW_SHARED_LIMIT_CELLS: 0
1453+
YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
1454+
RED_SHARED_LIMIT_CELLS: 0
1455+
RED_SHARED_RESUME_LIMIT_CELLS: 0
1456+
1457+
TM_THD_MC_EGR_SERVICE_POOL:
1458+
?
1459+
BUFFER_POOL: [[0,1]]
1460+
TM_EGR_SERVICE_POOL_ID: [[0,3]]
1461+
:
1462+
SHARED_LIMIT_CELLS: 0
1463+
SHARED_RESUME_LIMIT_CELLS: 0
1464+
COLOR_SPECIFIC_LIMITS: 0
1465+
YELLOW_SHARED_LIMIT_CELLS: 0
1466+
YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
1467+
RED_SHARED_LIMIT_CELLS: 0
1468+
RED_SHARED_RESUME_LIMIT_CELLS: 0
1469+
1470+
TM_ING_PORT_PRI_GRP:
1471+
?
1472+
PORT_ID: [[1, 4],
1473+
[11, 14],
1474+
[22, 25],
1475+
[33, 36],
1476+
[44, 47],
1477+
[55, 58],
1478+
[66, 69],
1479+
[77, 80],
1480+
[88, 91],
1481+
[99, 102],
1482+
[110, 113],
1483+
[121, 124],
1484+
[132, 135],
1485+
[143, 146],
1486+
[154, 157],
1487+
[165, 168],
1488+
[176, 179],
1489+
[187, 190],
1490+
[198, 201],
1491+
[209, 212],
1492+
[220, 223],
1493+
[231, 234],
1494+
[242, 245],
1495+
[253, 256],
1496+
[264, 267],
1497+
[275, 278],
1498+
[286, 289],
1499+
[297, 300],
1500+
[308, 311],
1501+
[319, 322],
1502+
[330, 333],
1503+
[341, 344]]
1504+
TM_PRI_GRP_ID: 3
1505+
:
1506+
PFC: 1
1507+
LOSSLESS: 1
1508+
...

‎device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm

+92
Original file line numberDiff line numberDiff line change
@@ -1926,3 +1926,95 @@ device:
19261926
DEVICE_CONFIG:
19271927
AUTOLOAD_BOARD_SETTINGS: 0
19281928
...
1929+
## Baseline
1930+
---
1931+
device:
1932+
0:
1933+
TM_THD_CONFIG:
1934+
SKIP_BUFFER_RESERVATION: 1
1935+
THRESHOLD_MODE: LOSSY_AND_LOSSLESS
1936+
...
1937+
---
1938+
device:
1939+
0:
1940+
TM_ING_THD_HEADROOM_POOL:
1941+
?
1942+
BUFFER_POOL: [[0,1]]
1943+
TM_HEADROOM_POOL_ID: [[0,3]]
1944+
:
1945+
LIMIT_CELLS: 0
1946+
1947+
TM_ING_THD_SERVICE_POOL:
1948+
?
1949+
BUFFER_POOL: [[0,1]]
1950+
TM_ING_SERVICE_POOL_ID: [[0,3]]
1951+
:
1952+
SHARED_LIMIT_CELLS: 0
1953+
SHARED_RESUME_OFFSET_CELLS: 0
1954+
COLOR_SPECIFIC_LIMITS: 0
1955+
1956+
TM_EGR_THD_SERVICE_POOL:
1957+
?
1958+
BUFFER_POOL: [[0,1]]
1959+
TM_EGR_SERVICE_POOL_ID: [[0,3]]
1960+
:
1961+
SHARED_LIMIT_CELLS: 0
1962+
SHARED_RESUME_LIMIT_CELLS: 0
1963+
COLOR_SPECIFIC_LIMITS: 0
1964+
YELLOW_SHARED_LIMIT_CELLS: 0
1965+
YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
1966+
RED_SHARED_LIMIT_CELLS: 0
1967+
RED_SHARED_RESUME_LIMIT_CELLS: 0
1968+
1969+
TM_THD_MC_EGR_SERVICE_POOL:
1970+
?
1971+
BUFFER_POOL: [[0,1]]
1972+
TM_EGR_SERVICE_POOL_ID: [[0,3]]
1973+
:
1974+
SHARED_LIMIT_CELLS: 0
1975+
SHARED_RESUME_LIMIT_CELLS: 0
1976+
COLOR_SPECIFIC_LIMITS: 0
1977+
YELLOW_SHARED_LIMIT_CELLS: 0
1978+
YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
1979+
RED_SHARED_LIMIT_CELLS: 0
1980+
RED_SHARED_RESUME_LIMIT_CELLS: 0
1981+
1982+
TM_ING_PORT_PRI_GRP:
1983+
?
1984+
PORT_ID: [[1, 8],
1985+
[11, 18],
1986+
[22, 29],
1987+
[33, 40],
1988+
[44, 51],
1989+
[55, 62],
1990+
[66, 73],
1991+
[77, 84],
1992+
[88, 95],
1993+
[99, 106],
1994+
[110, 117],
1995+
[121, 128],
1996+
[132, 139],
1997+
[143, 150],
1998+
[154, 161],
1999+
[165, 172],
2000+
[176, 183],
2001+
[187, 194],
2002+
[198, 205],
2003+
[209, 216],
2004+
[220, 227],
2005+
[231, 238],
2006+
[242, 249],
2007+
[253, 260],
2008+
[264, 271],
2009+
[275, 282],
2010+
[286, 293],
2011+
[297, 304],
2012+
[308, 315],
2013+
[319, 326],
2014+
[330, 337],
2015+
[341, 348]]
2016+
TM_PRI_GRP_ID: 3
2017+
:
2018+
PFC: 1
2019+
LOSSLESS: 1
2020+
...

0 commit comments

Comments
 (0)