FIX: Fix spisim.py in compute_erl (#5976)

Co-authored-by: pyansys-ci-bot <[email protected]>

Author: maxcapodi78

doc/changelog.d/5976.fixed.md

@@ -0,0 +1 @@
+Fix spisim.py in compute_erl

src/ansys/aedt/core/circuit.py

@@ -1659,6 +1659,7 @@ def create_tdr_schematic_from_snp(
         use_convolution=True,
         analyze=True,
         design_name="LNA",
+        impedance=50,
     ):
         """Create a schematic from a Touchstone file and automatically setup a TDR transient analysis.
 
@@ -1685,6 +1686,8 @@ def create_tdr_schematic_from_snp(
              Whether to automatically assign differential pairs. The default is ``False``.
         design_name : str, optional
             New schematic name. The default is ``"LNA"``.
+        impedance : float, optional
+            TDR single ended impedance. The default is ``50``. For differential tdr, it will be computed by PyAEDT.
 
         Returns
         -------
@@ -1717,6 +1720,7 @@ def create_tdr_schematic_from_snp(
             pos_y = unit_converter(delta_y - left * 1000, input_units="mil", output_units=self.modeler.schematic_units)
             left += 1
             new_tdr_comp = tdr_probe.place("Tdr_probe", [center_x, center_y + pos_y], angle=-90)
+            new_tdr_comp.parameters["Z0"] = 2 * impedance if differential else impedance
             try:
                 if isinstance(probe_pin, int):
                     p_pin = probe_pin
@@ -1742,7 +1746,7 @@ def create_tdr_schematic_from_snp(
                             name=pin.name, location=[loc[0] + loc1, loc[1]]
                         )
                     p1.pins[0].connect_to_component(pin, use_wire=True)
-
+                    p1.impedance = [f"{impedance}ohm", "0ohm"]
             _, first, second = new_tdr_comp.pins[0].connect_to_component(p_pin)
             self.modeler.move(first, [0, 100], "mil")
             if second.pins[0].location[0] > center_x:

src/ansys/aedt/core/visualization/post/compliance.py

@@ -866,7 +866,7 @@ def _create_parameters(self, pdf_report):
                     if not isinstance(trace_pin[0], int):
                         try:
                             ports = list(_design.excitation_names)
-                            thrus4p = [ports.index(i) for i in trace_pin]
+                            thrus4p = [ports.index(i) + 1 for i in trace_pin]
                             trace_pin = thrus4p
                         except IndexError:
                             _design.logger.error("Port not found.")

src/ansys/aedt/core/visualization/post/spisim.py

@@ -51,6 +51,7 @@ def __init__(self, touchstone_file=""):
             self.desktop_install_dir = os.environ[env_value(settings.aedt_version)]
         else:
             self.desktop_install_dir = os.environ[env_value(aedt_versions.current_version)]
+        os.environ["ANSYSEM_ROOT_PATH"] = self.desktop_install_dir
         self.logger = settings.logger
         self._working_directory = ""