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fix(PeriphDrivers): Configure SPI0 pins for MAX32672 #660

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Merged
merged 3 commits into from
Jul 26, 2023
Merged

fix(PeriphDrivers): Configure SPI0 pins for MAX32672 #660

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e664aef
fix(PeriphDrivers): Configure SPI0 pins for MAX32672
sihyung-maxim Jul 11, 2023
d50d1ed
Fix grammer and syntax in PR template
sihyung-maxim Jul 11, 2023
261207a
Merge branch 'main' into fix/me21_spi0
sihyung-maxim Jul 19, 2023
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2 changes: 1 addition & 1 deletion Libraries/PeriphDrivers/Include/MAX32672/mxc_pins.h
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Expand Up @@ -65,7 +65,7 @@ extern const mxc_gpio_cfg_t gpio_cfg_uart3;
extern const mxc_gpio_cfg_t gpio_cfg_uart3_flow;
extern const mxc_gpio_cfg_t gpio_cfg_uart3_flow_disable;

//extern const mxc_gpio_cfg_t gpio_cfg_spi0;
extern const mxc_gpio_cfg_t gpio_cfg_spi0;
extern const mxc_gpio_cfg_t gpio_cfg_spi0_ss0;
extern const mxc_gpio_cfg_t gpio_cfg_spi0_ss1;
extern const mxc_gpio_cfg_t gpio_cfg_spi0_ss2;
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1 change: 1 addition & 0 deletions Libraries/PeriphDrivers/Source/SPI/spi_me21.c
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Expand Up @@ -64,6 +64,7 @@ int MXC_SPI_Init(mxc_spi_regs_t *spi, int masterMode, int quadModeUsed, int numS
if (spi == MXC_SPI0) {
MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_SPI0);
MXC_SYS_Reset_Periph(MXC_SYS_RESET0_SPI0);
MXC_GPIO_Config(&gpio_cfg_spi0);

//ME21 SPI0 supports ss0-ss3 ship select
if (numSlaves == 1) {
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