How to use SocDemo.elf file ? #60

SoCScholar · 2023-11-03T22:31:11Z

Hi,

i found one issues with

naxRiscv/ext/NaxSoftware/baremetal/socdemo/src

is there any problem with la load address? it throws below errors

make compile OBJDIR=build/rv32ima  MARCH=rv32ima MABI=ilp32

CC src/crt.S

src/crt.S: Assembler messages:

src/crt.S:14: Error: illegal operands `la x1,(0x14000000+0*0x80)+0x10'
src/crt.S:27: Error: illegal operands `la x1,(0x14000000+0*0x80)+0x10'
src/crt.S:32: Error: illegal operands `la x1,(0x10000000+0x8)'
src/crt.S:34: Error: illegal operands `la x1,0x10000000'
src/crt.S:39: Error: illegal operands `la x1,(0x14000000+0xF04)'
src/crt.S:41: Error: illegal operands `la x1,(0x14000000+0xF24)'
src/crt.S:44: Error: illegal operands `la x1,(0x10000000+0x8)'
src/crt.S:46: Error: illegal operands `la x1,0x10000000'

make[1]: *** [../common/asm.mk:88: build/rv32ima//home/hsubedi/instruction_test_bed/riscv_NAX_2_l2_cache_new_pull
/NaxRiscv4_gtkwave/naxRiscv/ext/NaxSoftware/baremetal/socdemo/src/crt.o] Error 1

make: *** [../common/asm.mk:104: rv32ima] Error 2

How to use socdemo.elf generate file that is produce after make rv32ima ? is gtkwave is right one to use along with using sbt server?

is there any command line to use ?

like below command

runMain naxriscv.platform.tilelinkdemo.SocSim --load-elf play.elf --load-elf socdemo.elf --trace --nax-count 2 --no-rvls

Thank you so much

The text was updated successfully, but these errors were encountered:

Dolu1990 · 2023-11-04T08:41:10Z

socdemo.elf :

cd NaxRiscv/ext/NaxSoftware/baremetal/socdemo/
make rv32ima

Works fine for me.

You can only load one elf. the second one will just override the first one.

SoCScholar · 2023-11-04T13:01:12Z

There is a print in the assembly code, but I am wondering how it will be possible to see the printing of value of it.

The below command which has .elf file doesn't work in the sbt server after compiling it compile.

runMain naxriscv.platform.tilelinkdemo.SocSim --load-elf socdemo.elf --trace --nax-count 2 --no-rvls

Dolu1990 · 2023-11-06T12:26:39Z

On my side, i did a
runMain naxriscv.platform.tilelinkdemo.SocSim --load-elf ext/NaxSoftware/baremetal/socdemo/build/rv32ima/socdemo.elf

And got

[info] [Progress] Verilator compilation done in 1854.314 ms
[info] [Progress] Start SocDemo test simulation with seed 2
[info] Sim starting <3
[info] 00000004
[info] 00000007
[info] i$ refill = 6
[info] d$ refill = 4
[info] [Done] Simulation done in 73.549 m

You dont ?

SoCScholar · 2023-11-06T13:20:41Z

I get such errors

[error] Exception in thread "main" java.lang.NullPointerException

runMain naxriscv.platform.tilelinkdemo.SocSim --load-elf ext/NaxSoftware/baremetal/socdemo/build/rv32ima/socdemo.elf --no-rvls

[info] [Warning] toplevel/l2_cache_logic_cache/prober_ctx_ram : Mem[4*49 bits].readAsync can only be write first into Verilog
[info] [Warning] toplevel/toplevel_naxes_0_thread_core_DataCachePlugin_mem_toTilelink_coherent_onC_rspFifo/logic_ram : Mem[16*42 bits].readAsync can only be write first into Verilog
[info] [Warning] 1040 signals were pruned. You can call printPruned on the backend report to get more informations.
[info] [Done] at 3.739
[info] [Progress] Simulation workspace in /home/hsubedi/instruction_test_bed/riscv_NAX_2_l2_cache_new_pull/NaxRiscv5_gtkwave_5_Nov/NaxRiscv/./simWorkspace/SocDemo
[info] [Progress] Verilator compilation started
[info] [Progress] Verilator compilation done in 13712.317 ms
[info] [Progress] Start SocDemo test simulation with seed 2
[info] [Error] Simulation failed at time=0
[error] Exception in thread "main" java.lang.UnsatisfiedLinkError: Can't load library: /home/hsubedi/instruction_test_bed/riscv_NAX_2_l2_cache_new_pull/NaxRiscv5_gtkwave_5_Nov/NaxRiscv/ext/rvls/build/apps/rvls.so
[error] 	at java.base/java.lang.ClassLoader.loadLibrary(ClassLoader.java:2638)
[error] 	at java.base/java.lang.Runtime.load0(Runtime.java:768)
[error] 	at java.base/java.lang.System.load(System.java:1850)
[error] 	at rvls.jni.Frontend.<clinit>(Frontend.java:35)
[error] 	at naxriscv.platform.RvlsBackend.<init>(Tracer.scala:169)
[error] 	at naxriscv.platform.tilelinkdemo.SocSim$$anonfun$18.apply(SocSim.scala:154)
[error] 	at naxriscv.platform.tilelinkdemo.SocSim$$anonfun$18.apply(SocSim.scala:154)
[error] 	at spinal.core.internals.BooleanPimped.generate(Misc.scala:285)
[error] 	at naxriscv.platform.tilelinkdemo.SocSim$.testIt(SocSim.scala:154)
[error] 	at naxriscv.platform.tilelinkdemo.SocSim$$anonfun$17.apply(SocSim.scala:136)
[error] 	at naxriscv.platform.tilelinkdemo.SocSim$$anonfun$17.apply(SocSim.scala:136)
[error] 	at spinal.core.sim.SimCompiled$$anonfun$doSimApi$1.apply$mcV$sp(SimBootstraps.scala:606)
[error] 	at spinal.sim.SimThread$$anonfun$1.apply$mcV$sp(SimThread.scala:93)
[error] 	at spinal.sim.JvmThread.run(SimManager.scala:51)
[error] Nonzero exit code returned from runner: 1
[error] (Compile / runMain) Nonzero exit code returned from runner: 1
[error] Total time: 19 s, completed Nov 6, 2023, 2:04:22 PM



 


sbt:NaxRiscv> runMain naxriscv.platform.tilelinkdemo.SocSim --load-elf ext/NaxSoftware/baremetal/socdemo/build/rv32ima/socdemo.elf --no-rvls
[info] running (fork) naxriscv.platform.tilelinkdemo.SocSim --load-elf ext/NaxSoftware/baremetal/socdemo/build/rv32ima/socdemo.elf --no-rvls


[info] [Warning] toplevel/toplevel_naxes_0_thread_core_DataCachePlugin_mem_toTilelink_coherent_onC_rspFifo/logic_ram : Mem[16*42 bits].readAsync can only be write first into Verilog
[info] [Warning] 1040 signals were pruned. You can call printPruned on the backend report to get more informations.
[info] [Done] at 3.771
[info] [Progress] Simulation workspace in /home/hsubedi/instruction_test_bed/riscv_NAX_2_l2_cache_new_pull/NaxRiscv5_gtkwave_5_Nov/NaxRiscv/./simWorkspace/SocDemo
[info] [Progress] Verilator compilation started
[info] [info] Found cached verilator binaries
[info] [Progress] Verilator compilation done in 2421.519 ms
[info] [Progress] Start SocDemo test simulation with seed 2
[info] [Error] Simulation failed at time=0
[error] Exception in thread "main" java.lang.NullPointerException
[error] 	at naxriscv.platform.tilelinkdemo.SocSim$$anonfun$testIt$5.apply(SocSim.scala:195)
[error] 	at naxriscv.platform.tilelinkdemo.SocSim$$anonfun$testIt$5.apply(SocSim.scala:187)
[error] 	at scala.collection.mutable.ResizableArray$class.foreach(ResizableArray.scala:59)
[error] 	at scala.collection.mutable.ArrayBuffer.foreach(ArrayBuffer.scala:48)
[error] 	at naxriscv.platform.tilelinkdemo.SocSim$.testIt(SocSim.scala:187)
[error] 	at naxriscv.platform.tilelinkdemo.SocSim$$anonfun$17.apply(SocSim.scala:136)
[error] 	at naxriscv.platform.tilelinkdemo.SocSim$$anonfun$17.apply(SocSim.scala:136)
[error] 	at spinal.core.sim.SimCompiled$$anonfun$doSimApi$1.apply$mcV$sp(SimBootstraps.scala:606)
[error] 	at spinal.sim.SimThread$$anonfun$1.apply$mcV$sp(SimThread.scala:93)
[error] 	at spinal.sim.JvmThread.run(SimManager.scala:51)
[error] Nonzero exit code returned from runner: 1
[error] (Compile / runMain) Nonzero exit code returned from runner: 1
[error] Total time: 7 s, completed Nov 6, 2023, 2:05:32 PM
sbt:NaxRiscv>

SoCScholar · 2023-11-06T14:30:59Z

in line 195 i have

        naxes.foreach { nax =>
          nax.commitsCallbacks += { (hartId, pc) =>
            if (pc == passSymbol) delayed(1) {
              dut.naxes.flatMap(_.plugins).foreach {
                case p: FetchCachePlugin => println("i$ refill = " + p.logic.refill.pushCounter.toLong)
                case p: DataCachePlugin => println("d$ refill = " + p.logic.cache.refill.pushCounter.toLong)
                case _ =>
              }

              simSuccess()
            }
            if (pc == failSymbol) delayed(1)(simFailure("Software reach the fail symbole :("))
          }
        }

Dolu1990 · 2023-11-06T14:48:55Z

Solved by #58 (comment)

SoCScholar · 2023-11-06T15:14:49Z

I get another errors

sbt:NaxRiscv> runMain naxriscv.platform.tilelinkdemo.SocSim --load-elf ext/NaxSoftware/baremetal/socdemo/build/rv32ima/socdemo.elf --no-rvls

[info] [Warning] 1040 signals were pruned. You can call printPruned on the backend report to get more informations.
[info] [Done] at 3.822
[info] [Progress] Simulation workspace in /home/hsubedi/instruction_test_bed/riscv_NAX_2_l2_cache_new_pull/NaxRiscv5_gtkwave_5_Nov/NaxRiscv/./simWorkspace/SocDemo
[info] [Progress] Verilator compilation started
[info] [info] Found cached verilator binaries
[info] [Progress] Verilator compilation done in 2379.483 ms
[info] [Progress] Start SocDemo test simulation with seed 2
[info] Sim starting <3
[info] GET param=0 source=0 addr=0x0 bytes=4
[info] [Error] Simulation failed at time=6990
[error] Exception in thread "main" spinal.sim.SimFailure: 
[error] 	at spinal.core.sim.package$.simFailure(package.scala:168)
[error] 	at naxriscv.platform.PeripheralEmulator.onA(PeripheralEmulator.scala:71)
[error] 	at spinal.lib.bus.tilelink.sim.Monitor$$anonfun$onA$1.apply(Monitor.scala:33)
[error] 	at spinal.lib.bus.tilelink.sim.Monitor$$anonfun$onA$1.apply(Monitor.scala:33)
[error] 	at scala.collection.mutable.ResizableArray$class.foreach(ResizableArray.scala:59)
[error] 	at scala.collection.mutable.ArrayBuffer.foreach(ArrayBuffer.scala:48)
[error] 	at spinal.lib.bus.tilelink.sim.Monitor.onA(Monitor.scala:33)
[error] 	at spinal.lib.bus.tilelink.sim.Monitor$$anonfun$1.apply(Monitor.scala:44)
[error] 	at spinal.lib.bus.tilelink.sim.Monitor$$anonfun$1.apply(Monitor.scala:44)
[error] 	at spinal.lib.bus.tilelink.sim.TransactionAggregator.push(Transactions.scala:464)
[error] 	at spinal.lib.bus.tilelink.sim.Monitor$$anonfun$7.apply(Monitor.scala:54)
[error] 	at spinal.lib.bus.tilelink.sim.Monitor$$anonfun$7.apply(Monitor.scala:51)
[error] 	at spinal.lib.sim.StreamMonitor$$anonfun$1$$anonfun$apply$mcV$sp$1.apply(Stream.scala:33)
[error] 	at spinal.lib.sim.StreamMonitor$$anonfun$1$$anonfun$apply$mcV$sp$1.apply(Stream.scala:33)
[error] 	at scala.collection.mutable.ResizableArray$class.foreach(ResizableArray.scala:59)
[error] 	at scala.collection.mutable.ArrayBuffer.foreach(ArrayBuffer.scala:48)
[error] 	at spinal.lib.sim.StreamMonitor$$anonfun$1.apply$mcV$sp(Stream.scala:33)
[error] 	at spinal.core.sim.package$SimClockDomainPimper$$anonfun$onSamplings$1$$anonfun$apply$mcV$sp$1.apply(package.scala:969)
[error] 	at spinal.core.sim.package$SimClockDomainPimper$$anonfun$onSamplings$1$$anonfun$apply$mcV$sp$1.apply(package.scala:969)
[error] 	at scala.collection.mutable.ResizableArray$class.foreach(ResizableArray.scala:59)
[error] 	at scala.collection.mutable.ArrayBuffer.foreach(ArrayBuffer.scala:48)
[error] 	at spinal.core.sim.package$SimClockDomainPimper$$anonfun$onSamplings$1.apply$mcV$sp(package.scala:969)
[error] 	at spinal.core.sim.package$$anon$1.update(package.scala:194)
[error] 	at spinal.sim.SimManager.runWhile(SimManager.scala:324)
[error] 	at spinal.sim.SimManager.runAll(SimManager.scala:246)
[error] 	at spinal.core.sim.SimCompiled.doSimApi(SimBootstraps.scala:606)
[error] 	at spinal.core.sim.SimCompiled.doSimUntilVoid(SimBootstraps.scala:568)
[error] 	at naxriscv.platform.tilelinkdemo.SocSim$.delayedEndpoint$naxriscv$platform$tilelinkdemo$SocSim$1(SocSim.scala:136)
[error] 	at naxriscv.platform.tilelinkdemo.SocSim$delayedInit$body.apply(SocSim.scala:52)
[error] 	at scala.Function0$class.apply$mcV$sp(Function0.scala:34)
[error] 	at scala.runtime.AbstractFunction0.apply$mcV$sp(AbstractFunction0.scala:12)
[error] 	at scala.App$$anonfun$main$1.apply(App.scala:76)
[error] 	at scala.App$$anonfun$main$1.apply(App.scala:76)
[error] 	at scala.collection.immutable.List.foreach(List.scala:392)
[error] 	at scala.collection.generic.TraversableForwarder$class.foreach(TraversableForwarder.scala:35)
[error] 	at scala.App$class.main(App.scala:76)
[error] 	at naxriscv.platform.tilelinkdemo.SocSim$.main(SocSim.scala:52)
[error] 	at naxriscv.platform.tilelinkdemo.SocSim.main(SocSim.scala)
[error] Nonzero exit code returned from runner: 1
[error] (Compile / runMain) Nonzero exit code returned from runner: 1
[error] Total time: 7 s, completed Nov 6, 2023, 4:14:04 PM

Dolu1990 · 2023-11-06T15:22:29Z

Seems like the code you are executing is reading the address 0 ?
Can you give me your play.asm ?

SoCScholar · 2023-11-06T15:27:50Z

Play.elf is working pretty good

but problem is with socdemo.elf

as i cant not see following after [info] Sim starting <3 in my #60 (comment)

[info] 00000004
[info] 00000007
[info] i$ refill = 6
[info] d$ refill = 4
[info] [Done] Simulation done in 73.549 m

Please find them here

rv32ima.zip

play.zip

Dolu1990 · 2023-11-06T15:53:16Z

ahh yes, i meant socdemo.elf

So looking at your rv32ima.zip, i realy don't understand how you have this kind of sequaneces in the asm :

8000004c: 0000a503 lw a0,0(ra) # 10000000 <_start-0x70000000>
80000050: 00a0a023 sw a0,0(ra)

Did you modified the assembly code ?
How did you compiled it ?

SoCScholar · 2023-11-06T15:59:46Z

i get this errors when i compile with

make rv32ima

hsubedi@kronos:~/instruction_test_bed/riscv_NAX_2_l2_cache_new_pull/NaxRiscv5_gtkwave_5_Nov/NaxRiscv/ext/NaxSoftware/baremetal/socdemo$ make rv32ima
make compile OBJDIR=build/rv32ima  MARCH=rv32ima MABI=ilp32
CC src/crt.S
src/crt.S: Assembler messages:
src/crt.S:14: Error: illegal operands `la x1,(0x14000000+0*0x80)+0x10'
src/crt.S:27: Error: illegal operands `la x1,(0x14000000+0*0x80)+0x10'
src/crt.S:32: Error: illegal operands `la x1,(0x10000000+0x8)'
src/crt.S:34: Error: illegal operands `la x1,0x10000000'
src/crt.S:39: Error: illegal operands `la x1,(0x14000000+0xF04)'
src/crt.S:41: Error: illegal operands `la x1,(0x14000000+0xF24)'
src/crt.S:44: Error: illegal operands `la x1,(0x10000000+0x8)'
src/crt.S:46: Error: illegal operands `la x1,0x10000000'
make[1]: *** [../common/asm.mk:88: build/rv32ima//home/hsubedi/instruction_test_bed/riscv_NAX_2_l2_cache_new_pull/NaxRiscv5_gtkwave_5_Nov/NaxRiscv/ext/NaxSoftware/baremetal/socdemo/src/crt.o] Error 1
make: *** [../common/asm.mk:104: rv32ima] Error 2

Dolu1990 · 2023-11-06T16:00:56Z

Ahh what GCC version do you have ?

me
riscv64-unknown-elf-gcc --version
riscv64-unknown-elf-gcc () 11.1.0

SoCScholar · 2023-11-06T16:10:33Z

     
.globl _start
_start:

#include "../../driver/riscv_asm.h"
#include "../../driver/sim_asm.h"

#define SCOPE 0x14000000
#define SCOPE_L2_AQUIRE_MISS (SCOPE + 0xF04)
#define SCOPE_L2_GETPUT_MISS (SCOPE + 0xF24)
#define SCOPE_HART0 (SCOPE + 0*0x80)
#define SCOPE_HART_DCACHE_REFILL 0x10

    //read SCOPE_HART0_DCACHE_REFILL
    //la x1, SCOPE_HART0 + SCOPE_HART_DCACHE_REFILL
    lui x1, %hi(SCOPE_HART0) 
    addi x1, x1, %lo(SCOPE_HART0) 
    addi x1, x1, SCOPE_HART_DCACHE_REFILL
    lw x10, 0(x1)

    //run a test code which will generate 4 cache refill
    fence iorw, iorw
    la x1, data
    lw x2, 0(x1)
    lw x2, 0x40(x1)
    lw x2, 0x80(x1)
    lw x2, 0x120(x1)
    fence iorw, iorw

    //read SCOPE_HART0_DCACHE_REFILL
    //la x1, SCOPE_HART0 + SCOPE_HART_DCACHE_REFILL
    lui x1, %hi(SCOPE_HART0) 
    addi x1, x1, %lo(SCOPE_HART0) 
    addi x1, x1, SCOPE_HART_DCACHE_REFILL
    lw x11, 0(x1)

    //compute the number of cache refill and print it
    sub x10, x11, x10
  //la x1, PUT_HEX // la x1,(0x10000000+0x8)'
    lui x1, %hi(0x10000000)  // Load the upper 20 bits of the address
    addi x1, x1, %lo(0x10000000)  // Add the lower 12 bits of the address
    lw x10, 0(x1)
    sw x10, 0(x1)
//  la x1, PUTC
    lui x1, %hi(0x10000000)  // Load the upper 20 bits of the address
    addi x1, x1, %lo(0x10000000)  // Add the lower 12 bits of the address
    li x2, '\n'
    sw x2, 0(x1)

    //show how many l2 cache miss happend
    //la x1, SCOPE_L2_AQUIRE_MISS
    //lw x10, 0(x1)
    //la x1, SCOPE_L2_GETPUT_MISS
    lui x1, %hi(SCOPE_L2_AQUIRE_MISS)
    addi x1, x1, %lo(SCOPE_L2_AQUIRE_MISS)
    lw x10, 0(x1)
    lui x1, %hi(SCOPE_L2_GETPUT_MISS)
    addi x1, x1, %lo(SCOPE_L2_GETPUT_MISS)
    lw x11, 0(x1)
    add x10, x10, x11
    //la x1, PUT_HEX
    lui x1, %hi(0x10000000)  // Load the upper 20 bits of the address
    addi x1, x1, %lo(0x10000000)  // Add the lower 12 bits of the address
    lw x10, 0(x1)
    sw x10, 0(x1)
    //la x1, PUTC
    lui x1, %hi(0x10000000)  // Load the upper 20 bits of the address
    addi x1, x1, %lo(0x10000000)  // Add the lower 12 bits of the address    
    li x2, '\n'
    sw x2, 0(x1)
    j pass

pass:
    nop

fail:
    nop



.align 12
data:
    .word 0x27e91b60
    .word 0xa656bbbb   
    .word 0xf16f1650
    .word 0xea196a7e

Dolu1990 · 2023-11-06T16:35:09Z

lw x10, 0(x1) // This is the issue, why did you added it ?
sw x10, 0(x1)

SoCScholar · 2023-11-06T19:20:08Z

Thank you so much. yes it works now.

I have following riscv64-unknown-elf-gcc --version

hsubedi@kronos:~$  riscv64-unknown-elf-gcc --version  

riscv64-unknown-elf-gcc () 10.2.0

Now it works with 10.2.0 riscv64-unknown-elf-gcc () also

sbt:NaxRiscv> runMain naxriscv.platform.tilelinkdemo.SocSim  --load-elf ext/NaxSoftware/baremetal/socdemo/build/rv32ima/socdemo.elf --nax-count 2 --no-rvls

When i instantiated for 2 cores, it gives following result


[info] [Progress] Verilator compilation started
[info] [Progress] Verilator compilation done in 21180.189 ms
[info] [Progress] Start SocDemo test simulation with seed 2
[info] Sim starting <3
[info] 
[info] 
[info] i$ refill = 6
[info] d$ refill = 4
[info] i$ refill = 5
[info] d$ refill = 4
[info] [Done] Simulation done in 94.233 ms

will it be possible to give cpu thread/core number along with value like this

[info] i_0$ refill = 6
[info] d_0$ refill = 4
[info] i_1$ refill = 5
[info] d_1$ refill = 4

When i instantiated for 20 cores, it gives following result


[info] [Done] at 23.977
[info] [Progress] Simulation workspace in /home/hsubedi/instruction_test_bed/riscv_NAX_2_l2_cache_new_pull/NaxRiscv5_gtkwave_5_Nov/NaxRiscv/./simWorkspace/SocDemo
[info] [Progress] Verilator compilation started
[info] [Progress] Verilator compilation done in 219393.349 ms
[info] [Progress] Start SocDemo test simulation with seed 2
[info] Sim starting <3
[info] 
[info] 
[info] 
[info] 
[info] 
[info] 
[info] 
[info] 
[info] 
[info] 
[info] 
[info] 
[info] 
[info] 
[info] 
[info] 
[info] 
[info] 
[info] i$ refill = 6
[info] d$ refill = 4
[info] i$ refill = 5
[info] d$ refill = 4
[info] i$ refill = 6
[info] d$ refill = 4
[info] i$ refill = 4
[info] d$ refill = 4
[info] i$ refill = 5
[info] d$ refill = 4
[info] i$ refill = 5
[info] d$ refill = 4
[info] i$ refill = 5
[info] d$ refill = 4
[info] i$ refill = 5
[info] d$ refill = 4
[info] i$ refill = 5
[info] d$ refill = 4
[info] i$ refill = 5
[info] d$ refill = 4
[info] i$ refill = 5
[info] d$ refill = 4
[info] i$ refill = 5
[info] d$ refill = 4
[info] i$ refill = 5
[info] d$ refill = 4
[info] i$ refill = 5
[info] d$ refill = 4
[info] i$ refill = 5
[info] d$ refill = 4
[info] i$ refill = 5
[info] d$ refill = 4
[info] i$ refill = 5
[info] d$ refill = 4
[info] i$ refill = 5
[info] d$ refill = 4
[info] i$ refill = 5
[info] d$ refill = 4
[info] i$ refill = 5
[info] d$ refill = 4
[info] [Done] Simulation done in 1025.749 ms
[success] Total time: 246 s (04:06), completed Nov 6, 2023, 9:11:30 PM

Dolu1990 · 2023-11-10T09:50:30Z

pushed

SoCScholar · 2023-11-10T09:54:30Z

Thank you

Dolu1990 added a commit that referenced this issue Nov 10, 2023

fix #60

4cf12f6

SoCScholar closed this as completed Nov 10, 2023

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How to use SocDemo.elf file ? #60

How to use SocDemo.elf file ? #60

SoCScholar commented Nov 3, 2023

Dolu1990 commented Nov 4, 2023

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Dolu1990 commented Nov 6, 2023

SoCScholar commented Nov 6, 2023 •

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Dolu1990 commented Nov 6, 2023

SoCScholar commented Nov 6, 2023 •

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Dolu1990 commented Nov 6, 2023

SoCScholar commented Nov 6, 2023 •

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Dolu1990 commented Nov 6, 2023

SoCScholar commented Nov 6, 2023 •

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Dolu1990 commented Nov 10, 2023

SoCScholar commented Nov 10, 2023

How to use SocDemo.elf file ? #60

How to use SocDemo.elf file ? #60

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SoCScholar commented Nov 3, 2023

Dolu1990 commented Nov 4, 2023

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Dolu1990 commented Nov 6, 2023

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Dolu1990 commented Nov 6, 2023

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Dolu1990 commented Nov 6, 2023

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Dolu1990 commented Nov 6, 2023

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Dolu1990 commented Nov 10, 2023

SoCScholar commented Nov 10, 2023

SoCScholar commented Nov 4, 2023 •

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SoCScholar commented Nov 6, 2023 •

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SoCScholar commented Nov 6, 2023 •

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SoCScholar commented Nov 6, 2023 •

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SoCScholar commented Nov 6, 2023 •

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SoCScholar commented Nov 6, 2023 •

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SoCScholar commented Nov 6, 2023 •

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SoCScholar commented Nov 6, 2023 •

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