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This repository was archived by the owner on Aug 20, 2024. It is now read-only.
I'm trying to generate either a Tile.fir or Tile.mlir file in the generated-src directory after running the make command. However, I'm facing an issue.
Here's what I've done so far:
I ran make in the terminal as usual.
Then, I tried changing emitSystemVerilogFile to emitCHIRRTL in the code.
After that, I executed sbt 'runMain mini.Main'.
Despite these steps, I'm not seeing the expected Tile.fir or Tile.mlir files in the generated-src directory. It's quite puzzling for me.
Thanks in advance for any help or guidance you can provide!
The text was updated successfully, but these errors were encountered:
Stevengre
changed the title
Issue Generating Tile.fir or Tile.mlir in generated-src after Running make
How to Generate Tile.fir or Tile.mlir in generated-src after Running make?
Jan 20, 2024
Go to see #67 which modify Makefile and pass an argument --dump-fir to ChiselStage. emitSystemVerilog(File) is just a common API to generate something like SV or Firrtl file so there is no need to modify source code.
I'm trying to generate either a Tile.fir or Tile.mlir file in the generated-src directory after running the make command. However, I'm facing an issue.
Here's what I've done so far:
I ran make in the terminal as usual.
Then, I tried changing emitSystemVerilogFile to emitCHIRRTL in the code.
After that, I executed sbt 'runMain mini.Main'.
Despite these steps, I'm not seeing the expected Tile.fir or Tile.mlir files in the generated-src directory. It's quite puzzling for me.
Thanks in advance for any help or guidance you can provide!
The text was updated successfully, but these errors were encountered: