CPU/Recompiler: Fix incorrect shift in LUT fastmem

Author: stenzek

src/core/cpu_newrec_compiler_aarch64.cpp

@@ -1342,7 +1342,7 @@ vixl::aarch64::WRegister CPU::NewRec::AArch64Compiler::GenerateLoad(const vixl::
     if (g_settings.cpu_fastmem_mode == CPUFastmemMode::LUT)
     {
       DebugAssert(addr_reg.GetCode() != RWARG3.GetCode());
-      armAsm->lsr(RWARG3, addr_reg, Bus::FASTMEM_LUT_PAGE_SHIFT);
+      armAsm->lsr(RXARG3, addr_reg, Bus::FASTMEM_LUT_PAGE_SHIFT);
       armAsm->ldr(RXARG3, MemOperand(RMEMBASE, RXARG3, LSL, 8));
     }
 
@@ -1452,7 +1452,7 @@ void CPU::NewRec::AArch64Compiler::GenerateStore(const vixl::aarch64::WRegister&
     if (g_settings.cpu_fastmem_mode == CPUFastmemMode::LUT)
     {
       DebugAssert(addr_reg.GetCode() != RWARG3.GetCode());
-      armAsm->lsr(RWARG3, addr_reg, Bus::FASTMEM_LUT_PAGE_SHIFT);
+      armAsm->lsr(RXARG3, addr_reg, Bus::FASTMEM_LUT_PAGE_SHIFT);
       armAsm->ldr(RXARG3, MemOperand(RMEMBASE, RXARG3, LSL, 8));
     }
 

src/core/cpu_newrec_compiler_x64.cpp

@@ -1252,7 +1252,7 @@ Xbyak::Reg32 CPU::NewRec::X64Compiler::GenerateLoad(const Xbyak::Reg32& addr_reg
     {
       DebugAssert(addr_reg != RWARG3);
       cg->mov(RWARG3, addr_reg.cvt32());
-      cg->shr(RWARG3, Bus::FASTMEM_LUT_PAGE_SHIFT);
+      cg->shr(RXARG3, Bus::FASTMEM_LUT_PAGE_SHIFT);
       cg->mov(RXARG3, cg->qword[RMEMBASE + RXARG3 * 8]);
     }
 
@@ -1379,7 +1379,7 @@ void CPU::NewRec::X64Compiler::GenerateStore(const Xbyak::Reg32& addr_reg, const
     {
       DebugAssert(addr_reg != RWARG3 && value_reg != RWARG3);
       cg->mov(RWARG3, addr_reg.cvt32());
-      cg->shr(RWARG3, Bus::FASTMEM_LUT_PAGE_SHIFT);
+      cg->shr(RXARG3, Bus::FASTMEM_LUT_PAGE_SHIFT);
       cg->mov(RXARG3, cg->qword[RMEMBASE + RXARG3 * 8]);
     }
 

src/core/cpu_recompiler_code_generator_aarch64.cpp

@@ -1736,7 +1736,7 @@ void CodeGenerator::EmitLoadGuestRAMFastmem(const Value& address, RegSize size,
 
   if (g_settings.cpu_fastmem_mode == CPUFastmemMode::LUT)
   {
-    m_emit->lsr(GetHostReg32(RARG1), GetHostReg32(address_reg), Bus::FASTMEM_LUT_PAGE_SHIFT);
+    m_emit->lsr(GetHostReg64(RARG1), GetHostReg32(address_reg), Bus::FASTMEM_LUT_PAGE_SHIFT);
     m_emit->ldr(GetHostReg64(RARG1), a64::MemOperand(GetFastmemBasePtrReg(), GetHostReg64(RARG1), a64::LSL, 3));
   }
 
@@ -1779,7 +1779,7 @@ void CodeGenerator::EmitLoadGuestMemoryFastmem(Instruction instruction, const Co
 
   if (g_settings.cpu_fastmem_mode == CPUFastmemMode::LUT)
   {
-    m_emit->lsr(GetHostReg32(RARG1), GetHostReg32(address_reg), Bus::FASTMEM_LUT_PAGE_SHIFT);
+    m_emit->lsr(GetHostReg64(RARG1), GetHostReg32(address_reg), Bus::FASTMEM_LUT_PAGE_SHIFT);
     m_emit->ldr(GetHostReg64(RARG1), a64::MemOperand(GetFastmemBasePtrReg(), GetHostReg64(RARG1), a64::LSL, 3));
   }
 
@@ -1927,7 +1927,7 @@ void CodeGenerator::EmitStoreGuestMemoryFastmem(Instruction instruction, const C
 
   if (g_settings.cpu_fastmem_mode == CPUFastmemMode::LUT)
   {
-    m_emit->lsr(GetHostReg32(RARG1), GetHostReg32(address_reg), Bus::FASTMEM_LUT_PAGE_SHIFT);
+    m_emit->lsr(GetHostReg64(RARG1), GetHostReg32(address_reg), Bus::FASTMEM_LUT_PAGE_SHIFT);
     m_emit->ldr(GetHostReg64(RARG1), a64::MemOperand(GetFastmemBasePtrReg(), GetHostReg64(RARG1), a64::LSL, 3));
   }