|
| 1 | +From bf9905c1e297307b86d87a809bd42f343bd20cf6 Mon Sep 17 00:00:00 2001 |
| 2 | +From: Oleksandr Shamray < [email protected]> |
| 3 | +Date: Mon, 20 Jun 2022 16:02:14 +0300 |
| 4 | +Subject: [PATCH] platform: mellanox: Add config3 register support |
| 5 | + |
| 6 | +Add config3 register which is using to get COMEX CPU board version |
| 7 | + |
| 8 | +Signed-off-by: Oleksandr Shamray < [email protected]> |
| 9 | +--- |
| 10 | + drivers/platform/x86/mlx-platform.c | 9 +++++++++ |
| 11 | + 1 file changed, 9 insertions(+) |
| 12 | + |
| 13 | +diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c |
| 14 | +index defa87b44..ee4f8c7c6 100644 |
| 15 | +--- a/drivers/platform/x86/mlx-platform.c |
| 16 | ++++ b/drivers/platform/x86/mlx-platform.c |
| 17 | +@@ -105,6 +105,7 @@ |
| 18 | + #define MLXPLAT_CPLD_LPC_REG_PSU_I2C_CAP_OFFSET 0xf9 |
| 19 | + #define MLXPLAT_CPLD_LPC_REG_CONFIG1_OFFSET 0xfb |
| 20 | + #define MLXPLAT_CPLD_LPC_REG_CONFIG2_OFFSET 0xfc |
| 21 | ++#define MLXPLAT_CPLD_LPC_REG_CONFIG3_OFFSET 0xfd |
| 22 | + #define MLXPLAT_CPLD_LPC_IO_RANGE 0x100 |
| 23 | + #define MLXPLAT_CPLD_LPC_I2C_CH1_OFF 0xdb |
| 24 | + #define MLXPLAT_CPLD_LPC_I2C_CH2_OFF 0xda |
| 25 | +@@ -1806,6 +1807,12 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { |
| 26 | + .bit = GENMASK(7, 0), |
| 27 | + .mode = 0444, |
| 28 | + }, |
| 29 | ++ { |
| 30 | ++ .label = "config3", |
| 31 | ++ .reg = MLXPLAT_CPLD_LPC_REG_CONFIG3_OFFSET, |
| 32 | ++ .bit = GENMASK(7, 0), |
| 33 | ++ .mode = 0444, |
| 34 | ++ }, |
| 35 | + { |
| 36 | + .label = "ufm_version", |
| 37 | + .reg = MLXPLAT_CPLD_LPC_REG_UFM_VERSION_OFFSET, |
| 38 | +@@ -2267,6 +2274,7 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg) |
| 39 | + case MLXPLAT_CPLD_LPC_REG_PSU_I2C_CAP_OFFSET: |
| 40 | + case MLXPLAT_CPLD_LPC_REG_CONFIG1_OFFSET: |
| 41 | + case MLXPLAT_CPLD_LPC_REG_CONFIG2_OFFSET: |
| 42 | ++ case MLXPLAT_CPLD_LPC_REG_CONFIG3_OFFSET: |
| 43 | + case MLXPLAT_CPLD_LPC_REG_UFM_VERSION_OFFSET: |
| 44 | + return true; |
| 45 | + } |
| 46 | +@@ -2350,6 +2358,7 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg) |
| 47 | + case MLXPLAT_CPLD_LPC_REG_PSU_I2C_CAP_OFFSET: |
| 48 | + case MLXPLAT_CPLD_LPC_REG_CONFIG1_OFFSET: |
| 49 | + case MLXPLAT_CPLD_LPC_REG_CONFIG2_OFFSET: |
| 50 | ++ case MLXPLAT_CPLD_LPC_REG_CONFIG3_OFFSET: |
| 51 | + case MLXPLAT_CPLD_LPC_REG_UFM_VERSION_OFFSET: |
| 52 | + return true; |
| 53 | + } |
| 54 | +-- |
| 55 | +2.20.1 |
| 56 | + |
0 commit comments