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| 1 | +//! This test needs a connection between: |
| 2 | +//! |
| 3 | +//! | from GPIO (pico Pin) | to GPIO (pico Pin) | |
| 4 | +//! | -------------------- | ------------------ | |
| 5 | +//! | 0 (1) | 2 (4) | |
| 6 | +//! | 1 (2) | 3 (5) | |
| 7 | +
|
| 8 | +#![no_std] |
| 9 | +#![no_main] |
| 10 | +#![cfg(test)] |
| 11 | + |
| 12 | +use defmt_rtt as _; // defmt transport |
| 13 | +use defmt_test as _; |
| 14 | +use panic_probe as _; |
| 15 | +use rp2040_hal as hal; // memory layout // panic handler |
| 16 | + |
| 17 | +use hal::{async_utils::AsyncPeripheral, pac::interrupt}; |
| 18 | + |
| 19 | +/// The linker will place this boot block at the start of our program image. We |
| 20 | +/// need this to help the ROM bootloader get our code up and running. |
| 21 | +/// Note: This boot block is not necessary when using a rp-hal based BSP |
| 22 | +/// as the BSPs already perform this step. |
| 23 | +#[link_section = ".boot2"] |
| 24 | +#[used] |
| 25 | +pub static BOOT2: [u8; 256] = rp2040_boot2::BOOT_LOADER_GENERIC_03H; |
| 26 | + |
| 27 | +/// External high-speed crystal on the Raspberry Pi Pico board is 12 MHz. Adjust |
| 28 | +/// if your board has a different frequency |
| 29 | +const XTAL_FREQ_HZ: u32 = 12_000_000u32; |
| 30 | + |
| 31 | +pub mod i2c_tests; |
| 32 | + |
| 33 | +#[interrupt] |
| 34 | +unsafe fn PIO0_IRQ_0() { |
| 35 | + rp2040_hal::pio::Rx::<rp2040_hal::pio::PIO0SM0>::on_interrupt(rp2040_hal::pio::PioIRQ::Irq0); |
| 36 | + rp2040_hal::pio::Tx::<rp2040_hal::pio::PIO0SM0>::on_interrupt(rp2040_hal::pio::PioIRQ::Irq0); |
| 37 | + rp2040_hal::pio::Interrupt::<'_, rp2040_hal::pac::PIO0, 0>::on_interrupt(); |
| 38 | +} |
| 39 | + |
| 40 | +#[interrupt] |
| 41 | +unsafe fn I2C1_IRQ() { |
| 42 | + i2c_tests::Target::on_interrupt(); |
| 43 | +} |
| 44 | + |
| 45 | +#[defmt_test::tests] |
| 46 | +mod tests { |
| 47 | + use crate::i2c_tests::{ |
| 48 | + non_blocking::{self, run_test, State}, |
| 49 | + ADDR_10BIT, ADDR_7BIT, |
| 50 | + }; |
| 51 | + |
| 52 | + #[init] |
| 53 | + fn setup() -> State { |
| 54 | + non_blocking::system_setup(super::XTAL_FREQ_HZ, ADDR_7BIT) |
| 55 | + } |
| 56 | + |
| 57 | + #[test] |
| 58 | + fn embedded_hal(state: &mut State) { |
| 59 | + run_test(non_blocking::embedded_hal(state, ADDR_7BIT, 2..=2)); |
| 60 | + run_test(non_blocking::embedded_hal(state, ADDR_10BIT, 2..=7)); |
| 61 | + } |
| 62 | + |
| 63 | + #[test] |
| 64 | + fn transactions_iter(state: &mut State) { |
| 65 | + run_test(non_blocking::transaction(state, ADDR_7BIT, 7..=9)); |
| 66 | + run_test(non_blocking::transaction(state, ADDR_10BIT, 7..=14)); |
| 67 | + } |
| 68 | + |
| 69 | + #[test] |
| 70 | + fn i2c_write_iter(state: &mut State) { |
| 71 | + run_test(non_blocking::transaction_iter(state, ADDR_7BIT)); |
| 72 | + run_test(non_blocking::transaction_iter(state, ADDR_10BIT)); |
| 73 | + } |
| 74 | + |
| 75 | + #[test] |
| 76 | + fn transaction_iter(state: &mut State) { |
| 77 | + run_test(non_blocking::transaction_iter(state, ADDR_7BIT)); |
| 78 | + run_test(non_blocking::transaction_iter(state, ADDR_10BIT)); |
| 79 | + } |
| 80 | + |
| 81 | + // Sad paths: |
| 82 | + // invalid tx buf on write |
| 83 | + // invalid rx buf on read |
| 84 | + // |
| 85 | + // invalid (rx/tx) buf in transactions |
| 86 | + // |
| 87 | + // Peripheral Nack |
| 88 | + #[test] |
| 89 | + fn nak_on_addr(state: &mut State) { |
| 90 | + run_test(non_blocking::nak_on_addr(state, ADDR_7BIT, ADDR_7BIT + 1)); |
| 91 | + run_test(non_blocking::nak_on_addr(state, ADDR_10BIT, ADDR_10BIT + 1)); |
| 92 | + run_test(non_blocking::nak_on_addr( |
| 93 | + state, |
| 94 | + ADDR_10BIT, |
| 95 | + ADDR_10BIT + 0x100, |
| 96 | + )); |
| 97 | + } |
| 98 | + // |
| 99 | + // Arbritration conflict |
| 100 | +} |
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