Umbrella extensions shouldn't define instructions (#435)

* Extension A doesn't define any instructions (anymore)

Some instructions claim to be defined by the "A" extension or another
extension. Extension A was split into two "sub-extensions", "Zaamo"
and "Zalrsc", then defined to simply encompass both sub-extensions.

Since these instructions are actually now defined by the sub-extensions,
the instructions should only claim to be defined by them.

Also, move the instruction YAML files from `arch/inst/A` to their
new respective directories `arch/inst/{Zaamo,Zalrsc}`.

* Extension B doesn't define any instructions (anymore)

Some instructions claim to be defined by the "B" extension.
Extension B was split into four "sub-extensions": "Zba", "Zbb",
and "Zbs", then defined to simply encompass these sub-extensions.

Additionally, ratified extensions "Zbc", "Zbkb", "Zbkc", and "Zbkx" are
under the "B" umbrella (at least in the ISA 20240411, these are all
in Chapter 28 "B" Extension for Bit Manipulation, Version 1.0.0",
but these 3 extensions are shown only as "frozen").

Since these instructions are actually now defined by the sub-extensions,
the instructions should only claim to be defined by them.

Also, move the instruction YAML files from `arch/inst/B` to their
new respective directories `arch/inst/{Zba,Zbb,Zbc,Zbs,Zbkb,Zbkc,Zbkx}`,
when there is only one defining extension.

Some instructions are defined by multiple extensions. These are
left in the `arch/inst/B` directory, for lack of an unambiguously
better location.

* Extensions Zk, Zkn, Zks don't define any instructions

Some instructions claim to be defined by the "Zk/Zkn/Zks" extensions.
Remove these claims.

Also, move the instruction YAML files from `arch/inst/Zk` to their
new respective directories `arch/inst/{Zknd,Zkne,Zbkb}`,
when there is only one defining extension.

Some instructions are defined by multiple extensions. These are
moved to the `arch/inst/Zkn` directory, for lack of an unambiguously
better location.

* Extensions Zvkn, Zvks don't define any instructions

Some instructions claim to be defined by the "Zvkn/Zvks" extensions.
Remove these claims.

Also, move some instruction YAML files to their
new respective directories `arch/inst/{Zvkned,Zvknha}`.

Author: ThinkOpenly

arch/inst/B/andn.yaml

@@ -8,7 +8,7 @@ description: |
   This instruction performs the bitwise logical AND operation between `rs1` and the
   bitwise inversion of `rs2`.
 definedBy:
-  anyOf: [B, Zbb, Zbkb, Zk, Zkn, Zks]
+  anyOf: [Zbb, Zbkb]
 assembly: xd, xs1, xs2
 encoding:
   match: 0100000----------111-----0110011

arch/inst/B/clmul.yaml

@@ -7,7 +7,7 @@ long_name: Carry-less multiply (low-part)
 description: |
   `clmul` produces the lower half of the 2*XLEN carry-less product
 definedBy:
-  anyOf: [Zbc, Zbkc, Zk, Zkn, Zks]
+  anyOf: [Zbc, Zbkc]
 assembly: xd, xs1, xs2
 encoding:
   match: 0000101----------001-----0110011

arch/inst/B/clmulh.yaml

@@ -7,7 +7,7 @@ long_name: Carry-less multiply (high-part)
 description: |
   `clmulh` produces the upper half of the 2*XLEN carry-less product
 definedBy:
-  anyOf: [Zbc, Zbkc, Zk, Zkn, Zks]
+  anyOf: [Zbc, Zbkc]
 assembly: xd, xs1, xs2
 encoding:
   match: 0000101----------011-----0110011

arch/inst/B/orn.yaml

@@ -7,7 +7,7 @@ long_name: OR with inverted operand
 description: |
   This instruction performs the bitwise logical OR operation between rs1 and the bitwise inversion of rs2.
 definedBy:
-  anyOf: [B, Zbb, Zbkb, Zk, Zkn, Zks]
+  anyOf: [Zbb, Zbkb]
 assembly: xd, xs1, xs2
 encoding:
   match: 0100000----------110-----0110011

arch/inst/B/rev8.yaml

@@ -15,7 +15,7 @@ description: |
   and halfword-sized byte-reversal, perform a `rev8 rd,rs` followed by a `srai rd,rd,K`, where K
   is XLEN-32 and XLEN-16, respectively.
 definedBy:
-  anyOf: [B, Zbb, Zbkb]
+  anyOf: [Zbb, Zbkb]
 assembly: xd, xs1
 encoding:
   RV32:

arch/inst/B/rol.yaml

@@ -7,7 +7,7 @@ long_name: Rotate left (Register)
 description: |
   This instruction performs a rotate left of rs1 by the amount in least-significant `log2(XLEN)` bits of rs2.
 definedBy:
-  anyOf: [B, Zbb, Zbkb, Zk, Zkn, Zks]
+  anyOf: [Zbb, Zbkb]
 assembly: xd, xs1, xs2
 encoding:
   match: 0110000----------001-----0110011

arch/inst/B/rolw.yaml

@@ -8,7 +8,7 @@ description: |
   This instruction performs a rotate left of the least-significant word of rs1 by the amount in least-significant 5 bits of rs2.
   The resulting word value is sign-extended by copying bit 31 to all of the more-significant bits.
 definedBy:
-  anyOf: [B, Zbb, Zbkb, Zk, Zkn, Zks]
+  anyOf: [Zbb, Zbkb]
 assembly: xd, xs1, xs2
 base: 64
 encoding:

arch/inst/B/ror.yaml

@@ -7,7 +7,7 @@ long_name: Rotate right (Register)
 description: |
   This instruction performs a rotate right of rs1 by the amount in least-significant `log2(XLEN)` bits of rs2.
 definedBy:
-  anyOf: [B, Zbb, Zbkb, Zk, Zkn, Zks]
+  anyOf: [Zbb, Zbkb]
 assembly: xd, xs1, xs2
 encoding:
   match: 0110000----------101-----0110011

arch/inst/B/rori.yaml

@@ -8,7 +8,7 @@ description: |
   This instruction performs a rotate right of rs1 by the amount in the least-significant log2(XLEN) bits of shamt.
   For RV32, the encodings corresponding to shamt[5]=1 are reserved.
 definedBy:
-  anyOf: [B, Zbb, Zbkb, Zk, Zkn, Zks]
+  anyOf: [Zbb, Zbkb]
 assembly: xd, xs1, shamt
 encoding:
   RV32:

arch/inst/B/roriw.yaml

@@ -9,7 +9,7 @@ description: |
   the least-significant log2(XLEN) bits of shamt. The resulting word value is sign-extended by
   copying bit 31 to all of the more-significant bits.
 definedBy:
-  anyOf: [B, Zbb, Zbkb, Zk, Zkn, Zks]
+  anyOf: [Zbb, Zbkb]
 assembly: xd, xs1, shamt
 base: 64
 encoding:

arch/inst/B/rorw.yaml

@@ -9,7 +9,7 @@ description: |
   least-significant 5 bits of rs2. The resultant word is sign-extended by copying bit 31 to all
   of the more-significant bits.
 definedBy:
-  anyOf: [B, Zbb, Zbkb, Zk, Zkn, Zks]
+  anyOf: [Zbb, Zbkb]
 assembly: xd, xs1, xs2
 base: 64
 encoding:

arch/inst/B/xnor.yaml

@@ -7,7 +7,7 @@ long_name: Exclusive NOR
 description: |
   This instruction performs the bit-wise exclusive-NOR operation on rs1 and rs2.
 definedBy:
-  anyOf: [B, Zbb, Zbkb, Zk, Zkn, Zks]
+  anyOf: [Zbb, Zbkb]
 assembly: xd, xs1, xs2
 encoding:
   match: 0100000----------100-----0110011

arch/inst/A/amoadd.d.yaml renamed to arch/inst/Zaamo/amoadd.d.yaml

@@ -11,8 +11,7 @@ description: |
     * Write the loaded value into _rd_
     * Add the value of register _rs2_ to the loaded value
     * Write the sum to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 base: 64
 assembly: xd, xs2, (xs1)
 encoding:

arch/inst/A/amoadd.w.yaml renamed to arch/inst/Zaamo/amoadd.w.yaml

@@ -11,8 +11,7 @@ description: |
     * Write the sign-extended value into _rd_
     * Add the least-significant word of register _rs2_ to the loaded value
     * Write the sum to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 assembly: xd, xs2, (xrs1)
 encoding:
   match: 00000------------010-----0101111

arch/inst/A/amoand.d.yaml renamed to arch/inst/Zaamo/amoand.d.yaml

@@ -11,8 +11,7 @@ description: |
     * Write the loaded value into _rd_
     * AND the value of register _rs2_ to the loaded value
     * Write the result to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 base: 64
 assembly: xd, xs2, (xrs1)
 encoding:

arch/inst/A/amoand.w.yaml renamed to arch/inst/Zaamo/amoand.w.yaml

@@ -11,8 +11,7 @@ description: |
     * Write the sign-extended value into _rd_
     * AND the least-significant word of register _rs2_ to the loaded value
     * Write the result to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 assembly: xd, xs2, (xrs1)
 encoding:
   match: 01100------------010-----0101111

arch/inst/A/amomax.d.yaml renamed to arch/inst/Zaamo/amomax.d.yaml

@@ -11,8 +11,7 @@ description: |
     * Write the loaded value into _rd_
     * Signed compare the value of register _rs2_ to the loaded value, and select the maximum value
     * Write the maximum to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 base: 64
 assembly: xd, xs2, (xrs1)
 encoding:

arch/inst/A/amomax.w.yaml renamed to arch/inst/Zaamo/amomax.w.yaml

@@ -11,8 +11,7 @@ description: |
     * Write the sign-extended value into _rd_
     * Signed compare the least-significant word of register _rs2_ to the loaded value, and select the maximum value
     * Write the maximum to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 assembly: xd, xs2, (xrs1)
 encoding:
   match: 10100------------010-----0101111

arch/inst/A/amomaxu.d.yaml renamed to arch/inst/Zaamo/amomaxu.d.yaml

@@ -11,8 +11,7 @@ description: |
     * Write the loaded value into _rd_
     * Unsigned compare the value of register _rs2_ to the loaded value, and select the maximum value
     * Write the maximum to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 base: 64
 assembly: xd, xs2, (xrs1)
 encoding:

arch/inst/A/amomaxu.w.yaml renamed to arch/inst/Zaamo/amomaxu.w.yaml

@@ -11,8 +11,7 @@ description: |
     * Write the sign-extended value into _rd_
     * Unsigned compare the least-significant word of register _rs2_ to the loaded value, and select the maximum value
     * Write the maximum to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 assembly: xd, xs2, (xrs1)
 encoding:
   match: 11100------------010-----0101111

arch/inst/A/amomin.d.yaml renamed to arch/inst/Zaamo/amomin.d.yaml

@@ -11,8 +11,7 @@ description: |
     * Write the loaded value into _rd_
     * Signed compare the value of register _rs2_ to the loaded value, and select the minimum value
     * Write the minimum to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 base: 64
 assembly: xd, xs2, (xrs1)
 encoding:

arch/inst/A/amomin.w.yaml renamed to arch/inst/Zaamo/amomin.w.yaml

@@ -11,8 +11,7 @@ description: |
     * Write the sign-extended value into _rd_
     * Signed compare the least-significant word of register _rs2_ to the loaded value, and select the minimum value
     * Write the result to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 assembly: xd, xs2, (xrs1)
 encoding:
   match: 10000------------010-----0101111

arch/inst/A/amominu.d.yaml renamed to arch/inst/Zaamo/amominu.d.yaml

@@ -11,8 +11,7 @@ description: |
     * Write the loaded value into _rd_
     * Unsigned compare the value of register _rs2_ to the loaded value, and select the minimum value
     * Write the minimum to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 base: 64
 assembly: xd, xs2, (xrs1)
 encoding:

arch/inst/A/amominu.w.yaml renamed to arch/inst/Zaamo/amominu.w.yaml

@@ -11,8 +11,7 @@ description: |
     * Write the sign-extended value into _rd_
     * Unsigned compare the least-significant word of register _rs2_ to the loaded word, and select the minimum value
     * Write the result to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 assembly: xd, xs2, (xrs1)
 encoding:
   match: 11000------------010-----0101111

arch/inst/A/amoor.d.yaml renamed to arch/inst/Zaamo/amoor.d.yaml

@@ -11,8 +11,7 @@ description: |
     * Write the loaded value into _rd_
     * OR the value of register _rs2_ to the loaded value
     * Write the result to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 base: 64
 assembly: xd, xs2, (xrs1)
 encoding:

arch/inst/A/amoor.w.yaml renamed to arch/inst/Zaamo/amoor.w.yaml

@@ -11,8 +11,7 @@ description: |
     * Write the sign-extended value into _rd_
     * OR the least-significant word of register _rs2_ to the loaded value
     * Write the result to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 assembly: xd, xs2, (xrs1)
 encoding:
   match: 01000------------010-----0101111

arch/inst/A/amoswap.d.yaml renamed to arch/inst/Zaamo/amoswap.d.yaml

@@ -10,8 +10,7 @@ description: |
     * Load the doubleword at address _rs1_
     * Write the value into _rd_
     * Store the value of register _rs2_ to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 base: 64
 assembly: xd, xs2, (xrs1)
 encoding:

arch/inst/A/amoswap.w.yaml renamed to arch/inst/Zaamo/amoswap.w.yaml

@@ -10,8 +10,7 @@ description: |
     * Load the word at address _rs1_
     * Write the sign-extended value into _rd_
     * Store the least-significant word of register _rs2_ to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 assembly: xd, xs2, (xrs1)
 encoding:
   match: 00001------------010-----0101111

arch/inst/A/amoxor.d.yaml renamed to arch/inst/Zaamo/amoxor.d.yaml

@@ -11,8 +11,7 @@ description: |
     * Write the loaded value into _rd_
     * XOR the value of register _rs2_ to the loaded value
     * Write the result to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 base: 64
 assembly: xd, xs2, (xrs1)
 encoding:

arch/inst/A/amoxor.w.yaml renamed to arch/inst/Zaamo/amoxor.w.yaml

@@ -11,8 +11,7 @@ description: |
     * Write the sign-extended value into _rd_
     * XOR the least-significant word of register _rs2_ to the loaded value
     * Write the result to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 assembly: xd, xs2, (xrs1)
 encoding:
   match: 00100------------010-----0101111

arch/inst/A/lr.d.yaml renamed to arch/inst/Zalrsc/lr.d.yaml

@@ -42,8 +42,7 @@ description: |
   Software should not set the _rl_ bit on an LR instruction unless the _aq_ bit is also set.
   LR.rl and SC.aq instructions are not guaranteed to provide any stronger ordering than those
   with both bits clear, but may result in lower performance.
-definedBy:
-  anyOf: [A, Zalrsc]
+definedBy: Zalrsc
 base: 64
 assembly: xd, xs1
 encoding:

arch/inst/A/lr.w.yaml renamed to arch/inst/Zalrsc/lr.w.yaml

@@ -47,8 +47,7 @@ description: |
   Software should not set the _rl_ bit on an LR instruction unless the _aq_ bit is also set.
   LR.rl and SC.aq instructions are not guaranteed to provide any stronger ordering than those
   with both bits clear, but may result in lower performance.
-definedBy:
-  anyOf: [A, Zalrsc]
+definedBy: Zalrsc
 assembly: xd, xs1
 encoding:
   match: 00010--00000-----010-----0101111

arch/inst/A/sc.d.yaml renamed to arch/inst/Zalrsc/sc.d.yaml

@@ -98,8 +98,7 @@ description: |
   Software should not set the _rl_ bit on an LR instruction unless the _aq_ bit is also set.
   LR.rl and SC.aq instructions are not guaranteed to provide any stronger ordering than those
   with both bits clear, but may result in lower performance.
-definedBy:
-  anyOf: [A, Zalrsc]
+definedBy: Zalrsc
 base: 64
 assembly: xd, xs2, xs1
 encoding:

arch/inst/A/sc.w.yaml renamed to arch/inst/Zalrsc/sc.w.yaml

@@ -104,8 +104,7 @@ description: |
   Software should not set the _rl_ bit on an LR instruction unless the _aq_ bit is also set.
   LR.rl and SC.aq instructions are not guaranteed to provide any stronger ordering than those
   with both bits clear, but may result in lower performance.
-definedBy:
-  anyOf: [A, Zalrsc]
+definedBy: Zalrsc
 assembly: xd, xs2, xs1
 encoding:
   match: 00011------------010-----0101111

arch/inst/B/add.uw.yaml renamed to arch/inst/Zba/add.uw.yaml

@@ -8,8 +8,7 @@ base: 64
 description: |
   This instruction performs an XLEN-wide addition between rs2 and the
   zero-extended least-significant word of rs1.
-definedBy:
-  anyOf: [B, Zba]
+definedBy: Zba
 assembly: xd, xs1, xs2
 encoding:
   match: 0000100----------000-----0111011

arch/inst/B/sh1add.uw.yaml renamed to arch/inst/Zba/sh1add.uw.yaml

@@ -8,8 +8,7 @@ description: |
   This instruction performs an XLEN-wide addition of two addends. The first addend is rs2.
   The second addend is the unsigned value formed by extracting the least-significant word of rs1
   and shifting it left by 1 place.
-definedBy:
-  anyOf: [B, Zba]
+definedBy: Zba
 base: 64
 encoding:
   match: 0010000----------010-----0111011

arch/inst/B/sh1add.yaml renamed to arch/inst/Zba/sh1add.yaml

@@ -6,8 +6,7 @@ name: sh1add
 long_name: Shift left by 1 and add
 description: |
   This instruction shifts `rs1` to the left by 1 bit and adds it to `rs2`.
-definedBy:
-  anyOf: [B, Zba]
+definedBy: Zba
 assembly: xd, xs1, xs2
 encoding:
   match: 0010000----------010-----0110011

arch/inst/B/sh2add.uw.yaml renamed to arch/inst/Zba/sh2add.uw.yaml

@@ -8,8 +8,7 @@ description: |
   This instruction performs an XLEN-wide addition of two addends. The first addend is rs2.
   The second addend is the unsigned value formed by extracting the least-significant word of rs1
   and shifting it left by 2 places.
-definedBy:
-  anyOf: [B, Zba]
+definedBy: Zba
 base: 64
 assembly: xd, xs1, xs2
 encoding:

arch/inst/B/sh2add.yaml renamed to arch/inst/Zba/sh2add.yaml

@@ -6,8 +6,7 @@ name: sh2add
 long_name: Shift left by 2 and add
 description: |
   This instruction shifts `rs1` to the left by 2 places and adds it to `rs2`.
-definedBy:
-  anyOf: [B, Zba]
+definedBy: Zba
 assembly: xd, xs1, xs2
 encoding:
   match: 0010000----------100-----0110011

arch/inst/B/sh3add.uw.yaml renamed to arch/inst/Zba/sh3add.uw.yaml

@@ -8,8 +8,7 @@ description: |
   This instruction performs an XLEN-wide addition of two addends. The first addend is rs2.
   The second addend is the unsigned value formed by extracting the least-significant word of rs1
   and shifting it left by 3 places.
-definedBy:
-  anyOf: [B, Zba]
+definedBy: Zba
 base: 64
 assembly: xd, xs1, xs2
 encoding:

arch/inst/B/sh3add.yaml renamed to arch/inst/Zba/sh3add.yaml

@@ -6,8 +6,7 @@ name: sh3add
 long_name: Shift left by 3 and add
 description: |
   This instruction shifts `rs1` to the left by 3 places and adds it to `rs2`.
-definedBy:
-  anyOf: [B, Zba]
+definedBy: Zba
 assembly: xd, xs1, xs2
 encoding:
   match: 0010000----------110-----0110011