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ayosherayosher
authored
Merge branch 'main' into Xqccmp
2 parents a1a928b + 520df8c commit 93bc8fe

20 files changed

+94
-105
lines changed

‎Rakefile

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -33,7 +33,7 @@ def cfg_arch_for(config_name)
3333
)
3434
end
3535

36-
file "#{$root}/.stamps/dev_gems" do |t|
36+
file "#{$root}/.stamps/dev_gems" => ["#{$root}/.stamps"] do |t|
3737
sh "bundle exec yard config --gem-install-yri"
3838
sh "bundle exec yard gem"
3939
FileUtils.touch t.name

‎arch/inst/Zcmp/cm.mva01s.yaml

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Original file line numberDiff line numberDiff line change
@@ -10,6 +10,10 @@ description: |
1010
definedBy:
1111
anyOf:
1212
- Zcmp
13+
excludedBy:
14+
anyOf:
15+
- allOf: [C, D]
16+
- Zcd
1317
assembly: r1s, r2s
1418
encoding:
1519
match: 101011---11---10

‎arch/inst/Zcmp/cm.mvsa01.yaml

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Original file line numberDiff line numberDiff line change
@@ -12,6 +12,10 @@ description: |
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definedBy:
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anyOf:
1414
- Zcmp
15+
excludedBy:
16+
anyOf:
17+
- allOf: [C, D]
18+
- Zcd
1519
assembly: r1s, r2s
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encoding:
1721
match: 101011---01---10

‎arch/inst/Zcmp/cm.pop.yaml

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Original file line numberDiff line numberDiff line change
@@ -17,6 +17,10 @@ description: |
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definedBy:
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anyOf:
1919
- Zcmp
20+
excludedBy:
21+
anyOf:
22+
- allOf: [C, D]
23+
- Zcd
2024
assembly: reg_list, stack_adj
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encoding:
2226
match: 10111010------10

‎arch/inst/Zcmp/cm.popret.yaml

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Original file line numberDiff line numberDiff line change
@@ -17,6 +17,10 @@ description: |
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definedBy:
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anyOf:
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- Zcmp
20+
excludedBy:
21+
anyOf:
22+
- allOf: [C, D]
23+
- Zcd
2024
assembly: reg_list, stack_adj
2125
encoding:
2226
match: 10111110------10

‎arch/inst/Zcmp/cm.popretz.yaml

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -17,6 +17,10 @@ description: |
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definedBy:
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anyOf:
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- Zcmp
20+
excludedBy:
21+
anyOf:
22+
- allOf: [C, D]
23+
- Zcd
2024
assembly: reg_list, stack_adj
2125
encoding:
2226
match: 10111100------10

‎arch/inst/Zcmp/cm.push.yaml

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Original file line numberDiff line numberDiff line change
@@ -18,6 +18,10 @@ description: |
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definedBy:
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anyOf:
2020
- Zcmp
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excludedBy:
22+
anyOf:
23+
- allOf: [C, D]
24+
- Zcd
2125
assembly: reg_list, -stack_adj
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encoding:
2327
match: 10111000------10

‎bin/setup

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Original file line numberDiff line numberDiff line change
@@ -133,6 +133,7 @@ if [ ! -f $ROOT/.bundle/config ]; then
133133
cd $ROOT
134134
${RUN} bundle config set --local path ${ROOT}/.home/.gems
135135
${RUN} bundle config set --local cache_path ${ROOT}/.home/.cache
136+
${RUN} bundle config set --local with development
136137
cd $OLDDIR
137138
fi
138139

‎cfgs/qc_iu/arch_overlay/csr/Xqci/qc_flags.yaml

Lines changed: 0 additions & 81 deletions
This file was deleted.

‎cfgs/qc_iu/arch_overlay/ext/Xqci.yaml

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -149,8 +149,13 @@ versions:
149149
changes:
150150
- Fix encoding of qc.c.extu instruction
151151
- Fix encoding of qc.swmi instruction
152+
- Fix decoding of qc.pputci instruction
153+
- Fix decoding of qc.delay instruction (state that immediate cannot be 0)
152154
- Rename qc.slasat -> qc.shlsat
153155
- Rename qc.sllsat -> qc.shlusat
156+
- Add requirement to include Zca extension for Xqcisim since it has 16-bit instructions
157+
- Add requirement to include Zca extension for Xqcisync since it has 16-bit instructions
158+
- Remove qc.flags CSR
154159
implies:
155160
- [Xqcia, "0.4.0"]
156161
- [Xqciac, "0.2.0"]
@@ -159,14 +164,16 @@ versions:
159164
- [Xqcicli, "0.2.0"]
160165
- [Xqcicm, "0.2.0"]
161166
- [Xqcics, "0.2.0"]
162-
- [Xqcicsr, "0.2.0"]
167+
- [Xqcicsr, "0.3.0"]
163168
- [Xqciint, "0.2.0"]
164169
- [Xqcilb, "0.2.0"]
165170
- [Xqcili, "0.2.0"]
166171
- [Xqcilia, "0.2.0"]
167172
- [Xqcilo, "0.2.0"]
168173
- [Xqcilsm, "0.4.0"]
174+
- [Xqcisim, "0.2.0"]
169175
- [Xqcisls, "0.2.0"]
176+
- [Xqcisync, "0.2.0"]
170177
requires:
171178
name: Zca
172179
version: ">= 1.0.0"

‎cfgs/qc_iu/arch_overlay/ext/Xqcicsr.yaml

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Original file line numberDiff line numberDiff line change
@@ -28,6 +28,18 @@ versions:
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email: [email protected]
2929
changes:
3030
- Add information about instruction formats of each instruction
31+
- version: "0.3.0"
32+
state: frozen
33+
ratification_date: null
34+
contributors:
35+
- name: Albert Yosher
36+
company: Qualcomm Technologies, Inc.
37+
email: [email protected]
38+
- name: Derek Hower
39+
company: Qualcomm Technologies, Inc.
40+
email: [email protected]
41+
changes:
42+
- Remove qc.flags CSR
3143
description: |
3244
The Xqcicsr extension contains two instructions to read/write CSR which index is in register and not immediate.
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‎cfgs/qc_iu/arch_overlay/ext/Xqcisim.yaml

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Original file line numberDiff line numberDiff line change
@@ -16,6 +16,20 @@ versions:
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- name: Derek Hower
1717
company: Qualcomm Technologies, Inc.
1818
email: [email protected]
19+
- version: "0.2.0"
20+
state: frozen
21+
ratification_date: null
22+
contributors:
23+
- name: Albert Yosher
24+
company: Qualcomm Technologies, Inc.
25+
email: [email protected]
26+
- name: Derek Hower
27+
company: Qualcomm Technologies, Inc.
28+
email: [email protected]
29+
changes:
30+
- Fix decoding of qc.pputci instruction
31+
- Add requirement to include Zca extension since has 16-bit instructions
32+
requires: { name: Zca, version: ">= 1.0.0" }
1933
description: |
2034
The Xqcisim extension includes ten hint instructions to interface simulation environment.
2135
On real target any instruction from this extension executed as "no-operation" and have no effect.

‎cfgs/qc_iu/arch_overlay/ext/Xqcisync.yaml

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,20 @@ versions:
1616
- name: Derek Hower
1717
company: Qualcomm Technologies, Inc.
1818
email: [email protected]
19+
- version: "0.2.0"
20+
state: frozen
21+
ratification_date: null
22+
contributors:
23+
- name: Albert Yosher
24+
company: Qualcomm Technologies, Inc.
25+
email: [email protected]
26+
- name: Derek Hower
27+
company: Qualcomm Technologies, Inc.
28+
email: [email protected]
29+
changes:
30+
- Fix decoding of qc.delay instruction (state that immediate cannot be 0)
31+
- Add requirement to include Zca extension since has 16-bit instructions
32+
requires: { name: Zca, version: ">= 1.0.0" }
1933
description: |
2034
The Xqcisync extension includes nine instructions, eight for non-memory-mapped devices synchronization and delay instruction.
2135
Synchronization instructions are kind of IO fences that work with special devices synchronization signals.

‎cfgs/qc_iu/arch_overlay/inst/Xqci/qc.c.delay.yaml

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Original file line numberDiff line numberDiff line change
@@ -18,6 +18,7 @@ encoding:
1818
variables:
1919
- name: imm
2020
location: 6-2
21+
not: 0
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access:
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s: always
2324
u: always

‎cfgs/qc_iu/arch_overlay/inst/Xqci/qc.c.mienter.nest.yaml

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,7 @@ operation(): |
2525
XReg mepc_val = CSR[mepc].sw_read();
2626
XReg mnepc_val = CSR[qc_mnepc].sw_read();
2727
XReg mcause_val = CSR[mcause].sw_read();
28-
XReg flags_val = CSR[qc_flags].sw_read();
28+
XReg reserved_val = 0;
2929
if (CSR[mcause].NMI != 1'b1) {
3030
write_memory<32>(virtual_address - 4, mepc_val, $encoding);
3131
} else {
@@ -34,7 +34,7 @@ operation(): |
3434
write_memory<32>(virtual_address - 8, X[ 8][31:0], $encoding);
3535
write_memory<32>(virtual_address - 12, mcause_val, $encoding);
3636
write_memory<32>(virtual_address - 16, X[ 1][31:0], $encoding);
37-
write_memory<32>(virtual_address - 20, flags_val, $encoding);
37+
write_memory<32>(virtual_address - 20, reserved_val, $encoding);
3838
write_memory<32>(virtual_address - 24, X[ 5][31:0], $encoding);
3939
write_memory<32>(virtual_address - 28, X[ 6][31:0], $encoding);
4040
write_memory<32>(virtual_address - 32, X[ 7][31:0], $encoding);

‎cfgs/qc_iu/arch_overlay/inst/Xqci/qc.c.mienter.yaml

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -27,7 +27,7 @@ operation(): |
2727
XReg mepc_val = CSR[mepc].sw_read();
2828
XReg mnepc_val = CSR[qc_mnepc].sw_read();
2929
XReg mcause_val = CSR[mcause].sw_read();
30-
XReg flags_val = CSR[qc_flags].sw_read();
30+
XReg reserved_val = 0;
3131
if (CSR[mcause].NMI != 1'b1) {
3232
write_memory<32>(virtual_address - 4, mepc_val, $encoding);
3333
} else {
@@ -36,7 +36,7 @@ operation(): |
3636
write_memory<32>(virtual_address - 8, X[ 8][31:0], $encoding);
3737
write_memory<32>(virtual_address - 12, mcause_val, $encoding);
3838
write_memory<32>(virtual_address - 16, X[ 1][31:0], $encoding);
39-
write_memory<32>(virtual_address - 20, flags_val, $encoding);
39+
write_memory<32>(virtual_address - 20, reserved_val, $encoding);
4040
write_memory<32>(virtual_address - 24, X[ 5][31:0], $encoding);
4141
write_memory<32>(virtual_address - 28, X[ 6][31:0], $encoding);
4242
write_memory<32>(virtual_address - 32, X[ 7][31:0], $encoding);

‎cfgs/qc_iu/arch_overlay/inst/Xqci/qc.c.mileaveret.yaml

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Original file line numberDiff line numberDiff line change
@@ -33,7 +33,6 @@ operation(): |
3333
X[ 8] = read_memory<32>(virtual_address - 8, $encoding);
3434
CSR[mcause].sw_write(read_memory<32>(virtual_address - 12, $encoding));
3535
X[ 1] = read_memory<32>(virtual_address - 16, $encoding);
36-
CSR[qc_flags].sw_write(read_memory<32>(virtual_address - 20, $encoding));
3736
X[ 5] = read_memory<32>(virtual_address - 24, $encoding);
3837
X[ 6] = read_memory<32>(virtual_address - 28, $encoding);
3938
X[ 7] = read_memory<32>(virtual_address - 32, $encoding);

‎cfgs/qc_iu/arch_overlay/inst/Xqci/qc.c.muliadd.yaml

Lines changed: 7 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -8,14 +8,13 @@ description: |
88
Increments `rd` by the multiplication of `rs1` and an unsigned immediate
99
Instruction encoded in CL instruction format.
1010
definedBy:
11-
allOf:
12-
- not:
13-
anyOf:
14-
- allOf: [C, D]
15-
- Zcd
16-
- anyOf:
17-
- Xqci
18-
- Xqciac
11+
anyOf:
12+
- Xqci
13+
- Xqciac
14+
excludedBy:
15+
anyOf:
16+
- allOf: [C, D]
17+
- Zcd
1918
base: 32
2019
encoding:
2120
match: 001-----------10

‎cfgs/qc_iu/arch_overlay/inst/Xqci/qc.c.mveqz.yaml

Lines changed: 7 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -8,14 +8,13 @@ description: |
88
Move `rs1` to `rd` if `rd` == 0, keep `rd` value otherwise
99
Instruction encoded in CL instruction format.
1010
definedBy:
11-
allOf:
12-
- anyOf:
13-
- Xqci
14-
- Xqcicm
15-
- not:
16-
anyOf:
17-
- allOf: [C, D]
18-
- Zcd
11+
anyOf:
12+
- Xqci
13+
- Xqciac
14+
excludedBy:
15+
anyOf:
16+
- allOf: [C, D]
17+
- Zcd
1918
base: 32
2019
encoding:
2120
match: 101011---00---10

‎cfgs/qc_iu/arch_overlay/inst/Xqci/qc.pputci.yaml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -18,7 +18,7 @@ encoding:
1818
match: 0100--------00000010000000010011
1919
variables:
2020
- name: imm
21-
location: 29-20
21+
location: 27-20
2222
access:
2323
s: always
2424
u: always

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