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guix: fix vmov alignment issues with gcc 10.3.0 & mingw-w64
This introduces a patch to our GCC (10.3.0) mingw-w64 compiler, in Guix, to make it avoid using aligned vmov instructions. This works around a longstanding issue in GCC, https://gcc.gnu.org/bugzilla/show_bug.cgi?id=54412, which was recently discovered to be causing issues, see #24726. Note that distros like Debian are also patching around this issue, and that is where this patch comes from. This would also explain why we haven't run into this problem earlier, in development builds. See: https://salsa.debian.org/mingw-w64-team/gcc-mingw-w64/-/blob/master/debian/patches/vmov-alignment.patch. Fixes #24726. Alternative to #24727. See also: https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=939559
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‎contrib/guix/manifest.scm

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -162,13 +162,17 @@ desirable for building Bitcoin Core release binaries."
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(define (make-gcc-with-pthreads gcc)
163163
(package-with-extra-configure-variable gcc "--enable-threads" "posix"))
164164

165+
(define (make-mingw-w64-cross-gcc-vmov-alignment cross-gcc)
166+
(package-with-extra-patches cross-gcc
167+
(search-our-patches "vmov-alignment.patch")))
168+
165169
(define (make-mingw-pthreads-cross-toolchain target)
166170
"Create a cross-compilation toolchain package for TARGET"
167171
(let* ((xbinutils (cross-binutils target))
168172
(pthreads-xlibc mingw-w64-x86_64-winpthreads)
169173
(pthreads-xgcc (make-gcc-with-pthreads
170174
(cross-gcc target
171-
#:xgcc (make-ssp-fixed-gcc base-gcc)
175+
#:xgcc (make-ssp-fixed-gcc (make-mingw-w64-cross-gcc-vmov-alignment base-gcc))
172176
#:xbinutils xbinutils
173177
#:libc pthreads-xlibc))))
174178
;; Define a meta-package that propagates the resulting XBINUTILS, XLIBC, and

‎contrib/guix/patches/vmov-alignment.patch

Lines changed: 267 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,267 @@
1+
Description: Use unaligned VMOV instructions
2+
Author: Stephen Kitt <[email protected]>
3+
Bug-Debian: https://bugs.debian.org/939559
4+
5+
Based on a patch originally by Claude Heiland-Allen <[email protected]>
6+
7+
--- a/gcc/config/i386/sse.md
8+
+++ b/gcc/config/i386/sse.md
9+
@@ -1058,17 +1058,11 @@
10+
{
11+
if (FLOAT_MODE_P (GET_MODE_INNER (<MODE>mode)))
12+
{
13+
- if (misaligned_operand (operands[1], <MODE>mode))
14+
- return "vmovu<ssemodesuffix>\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}";
15+
- else
16+
- return "vmova<ssemodesuffix>\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}";
17+
+ return "vmovu<ssemodesuffix>\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}";
18+
}
19+
else
20+
{
21+
- if (misaligned_operand (operands[1], <MODE>mode))
22+
- return "vmovdqu<ssescalarsize>\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}";
23+
- else
24+
- return "vmovdqa<ssescalarsize>\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}";
25+
+ return "vmovdqu<ssescalarsize>\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}";
26+
}
27+
}
28+
[(set_attr "type" "ssemov")
29+
@@ -1184,17 +1178,11 @@
30+
{
31+
if (FLOAT_MODE_P (GET_MODE_INNER (<MODE>mode)))
32+
{
33+
- if (misaligned_operand (operands[0], <MODE>mode))
34+
- return "vmovu<ssemodesuffix>\t{%1, %0%{%2%}|%0%{%2%}, %1}";
35+
- else
36+
- return "vmova<ssemodesuffix>\t{%1, %0%{%2%}|%0%{%2%}, %1}";
37+
+ return "vmovu<ssemodesuffix>\t{%1, %0%{%2%}|%0%{%2%}, %1}";
38+
}
39+
else
40+
{
41+
- if (misaligned_operand (operands[0], <MODE>mode))
42+
- return "vmovdqu<ssescalarsize>\t{%1, %0%{%2%}|%0%{%2%}, %1}";
43+
- else
44+
- return "vmovdqa<ssescalarsize>\t{%1, %0%{%2%}|%0%{%2%}, %1}";
45+
+ return "vmovdqu<ssescalarsize>\t{%1, %0%{%2%}|%0%{%2%}, %1}";
46+
}
47+
}
48+
[(set_attr "type" "ssemov")
49+
@@ -7806,7 +7794,7 @@
50+
"TARGET_SSE && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
51+
"@
52+
%vmovlps\t{%1, %0|%q0, %1}
53+
- %vmovaps\t{%1, %0|%0, %1}
54+
+ %vmovups\t{%1, %0|%0, %1}
55+
%vmovlps\t{%1, %d0|%d0, %q1}"
56+
[(set_attr "type" "ssemov")
57+
(set_attr "prefix" "maybe_vex")
58+
@@ -13997,29 +13985,15 @@
59+
switch (<MODE>mode)
60+
{
61+
case E_V8DFmode:
62+
- if (misaligned_operand (operands[2], <ssequartermode>mode))
63+
- return "vmovupd\t{%2, %x0|%x0, %2}";
64+
- else
65+
- return "vmovapd\t{%2, %x0|%x0, %2}";
66+
+ return "vmovupd\t{%2, %x0|%x0, %2}";
67+
case E_V16SFmode:
68+
- if (misaligned_operand (operands[2], <ssequartermode>mode))
69+
- return "vmovups\t{%2, %x0|%x0, %2}";
70+
- else
71+
- return "vmovaps\t{%2, %x0|%x0, %2}";
72+
+ return "vmovups\t{%2, %x0|%x0, %2}";
73+
case E_V8DImode:
74+
- if (misaligned_operand (operands[2], <ssequartermode>mode))
75+
- return which_alternative == 2 ? "vmovdqu64\t{%2, %x0|%x0, %2}"
76+
+ return which_alternative == 2 ? "vmovdqu64\t{%2, %x0|%x0, %2}"
77+
: "vmovdqu\t{%2, %x0|%x0, %2}";
78+
- else
79+
- return which_alternative == 2 ? "vmovdqa64\t{%2, %x0|%x0, %2}"
80+
- : "vmovdqa\t{%2, %x0|%x0, %2}";
81+
case E_V16SImode:
82+
- if (misaligned_operand (operands[2], <ssequartermode>mode))
83+
- return which_alternative == 2 ? "vmovdqu32\t{%2, %x0|%x0, %2}"
84+
+ return which_alternative == 2 ? "vmovdqu32\t{%2, %x0|%x0, %2}"
85+
: "vmovdqu\t{%2, %x0|%x0, %2}";
86+
- else
87+
- return which_alternative == 2 ? "vmovdqa32\t{%2, %x0|%x0, %2}"
88+
- : "vmovdqa\t{%2, %x0|%x0, %2}";
89+
default:
90+
gcc_unreachable ();
91+
}
92+
@@ -21225,63 +21199,27 @@
93+
switch (get_attr_mode (insn))
94+
{
95+
case MODE_V16SF:
96+
- if (misaligned_operand (operands[1], <ssehalfvecmode>mode))
97+
- return "vmovups\t{%1, %t0|%t0, %1}";
98+
- else
99+
- return "vmovaps\t{%1, %t0|%t0, %1}";
100+
+ return "vmovups\t{%1, %t0|%t0, %1}";
101+
case MODE_V8DF:
102+
- if (misaligned_operand (operands[1], <ssehalfvecmode>mode))
103+
- return "vmovupd\t{%1, %t0|%t0, %1}";
104+
- else
105+
- return "vmovapd\t{%1, %t0|%t0, %1}";
106+
+ return "vmovupd\t{%1, %t0|%t0, %1}";
107+
case MODE_V8SF:
108+
- if (misaligned_operand (operands[1], <ssehalfvecmode>mode))
109+
- return "vmovups\t{%1, %x0|%x0, %1}";
110+
- else
111+
- return "vmovaps\t{%1, %x0|%x0, %1}";
112+
+ return "vmovups\t{%1, %x0|%x0, %1}";
113+
case MODE_V4DF:
114+
- if (misaligned_operand (operands[1], <ssehalfvecmode>mode))
115+
- return "vmovupd\t{%1, %x0|%x0, %1}";
116+
- else
117+
- return "vmovapd\t{%1, %x0|%x0, %1}";
118+
+ return "vmovupd\t{%1, %x0|%x0, %1}";
119+
case MODE_XI:
120+
- if (misaligned_operand (operands[1], <ssehalfvecmode>mode))
121+
- {
122+
- if (which_alternative == 2)
123+
- return "vmovdqu\t{%1, %t0|%t0, %1}";
124+
- else if (GET_MODE_SIZE (<ssescalarmode>mode) == 8)
125+
- return "vmovdqu64\t{%1, %t0|%t0, %1}";
126+
- else
127+
- return "vmovdqu32\t{%1, %t0|%t0, %1}";
128+
- }
129+
+ if (which_alternative == 2)
130+
+ return "vmovdqu\t{%1, %t0|%t0, %1}";
131+
+ else if (GET_MODE_SIZE (<ssescalarmode>mode) == 8)
132+
+ return "vmovdqu64\t{%1, %t0|%t0, %1}";
133+
else
134+
- {
135+
- if (which_alternative == 2)
136+
- return "vmovdqa\t{%1, %t0|%t0, %1}";
137+
- else if (GET_MODE_SIZE (<ssescalarmode>mode) == 8)
138+
- return "vmovdqa64\t{%1, %t0|%t0, %1}";
139+
- else
140+
- return "vmovdqa32\t{%1, %t0|%t0, %1}";
141+
- }
142+
+ return "vmovdqu32\t{%1, %t0|%t0, %1}";
143+
case MODE_OI:
144+
- if (misaligned_operand (operands[1], <ssehalfvecmode>mode))
145+
- {
146+
- if (which_alternative == 2)
147+
- return "vmovdqu\t{%1, %x0|%x0, %1}";
148+
- else if (GET_MODE_SIZE (<ssescalarmode>mode) == 8)
149+
- return "vmovdqu64\t{%1, %x0|%x0, %1}";
150+
- else
151+
- return "vmovdqu32\t{%1, %x0|%x0, %1}";
152+
- }
153+
+ if (which_alternative == 2)
154+
+ return "vmovdqu\t{%1, %x0|%x0, %1}";
155+
+ else if (GET_MODE_SIZE (<ssescalarmode>mode) == 8)
156+
+ return "vmovdqu64\t{%1, %x0|%x0, %1}";
157+
else
158+
- {
159+
- if (which_alternative == 2)
160+
- return "vmovdqa\t{%1, %x0|%x0, %1}";
161+
- else if (GET_MODE_SIZE (<ssescalarmode>mode) == 8)
162+
- return "vmovdqa64\t{%1, %x0|%x0, %1}";
163+
- else
164+
- return "vmovdqa32\t{%1, %x0|%x0, %1}";
165+
- }
166+
+ return "vmovdqu32\t{%1, %x0|%x0, %1}";
167+
default:
168+
gcc_unreachable ();
169+
}
170+
--- a/gcc/config/i386/i386.c
171+
+++ b/gcc/config/i386/i386.c
172+
@@ -4981,13 +4981,13 @@
173+
switch (type)
174+
{
175+
case opcode_int:
176+
- opcode = misaligned_p ? "vmovdqu32" : "vmovdqa32";
177+
+ opcode = "vmovdqu32";
178+
break;
179+
case opcode_float:
180+
- opcode = misaligned_p ? "vmovups" : "vmovaps";
181+
+ opcode = "vmovups";
182+
break;
183+
case opcode_double:
184+
- opcode = misaligned_p ? "vmovupd" : "vmovapd";
185+
+ opcode = "vmovupd";
186+
break;
187+
}
188+
}
189+
@@ -4996,16 +4996,16 @@
190+
switch (scalar_mode)
191+
{
192+
case E_SFmode:
193+
- opcode = misaligned_p ? "%vmovups" : "%vmovaps";
194+
+ opcode = "%vmovups";
195+
break;
196+
case E_DFmode:
197+
- opcode = misaligned_p ? "%vmovupd" : "%vmovapd";
198+
+ opcode = "%vmovupd";
199+
break;
200+
case E_TFmode:
201+
if (evex_reg_p)
202+
- opcode = misaligned_p ? "vmovdqu64" : "vmovdqa64";
203+
+ opcode = "vmovdqu64";
204+
else
205+
- opcode = misaligned_p ? "%vmovdqu" : "%vmovdqa";
206+
+ opcode = "%vmovdqu";
207+
break;
208+
default:
209+
gcc_unreachable ();
210+
@@ -5017,48 +5017,32 @@
211+
{
212+
case E_QImode:
213+
if (evex_reg_p)
214+
- opcode = (misaligned_p
215+
- ? (TARGET_AVX512BW
216+
- ? "vmovdqu8"
217+
- : "vmovdqu64")
218+
- : "vmovdqa64");
219+
+ opcode = TARGET_AVX512BW ? "vmovdqu8" : "vmovdqu64";
220+
else
221+
- opcode = (misaligned_p
222+
- ? (TARGET_AVX512BW
223+
- ? "vmovdqu8"
224+
- : "%vmovdqu")
225+
- : "%vmovdqa");
226+
+ opcode = TARGET_AVX512BW ? "vmovdqu8" : "%vmovdqu";
227+
break;
228+
case E_HImode:
229+
if (evex_reg_p)
230+
- opcode = (misaligned_p
231+
- ? (TARGET_AVX512BW
232+
- ? "vmovdqu16"
233+
- : "vmovdqu64")
234+
- : "vmovdqa64");
235+
+ opcode = TARGET_AVX512BW ? "vmovdqu16" : "vmovdqu64";
236+
else
237+
- opcode = (misaligned_p
238+
- ? (TARGET_AVX512BW
239+
- ? "vmovdqu16"
240+
- : "%vmovdqu")
241+
- : "%vmovdqa");
242+
+ opcode = TARGET_AVX512BW ? "vmovdqu16" : "%vmovdqu";
243+
break;
244+
case E_SImode:
245+
if (evex_reg_p)
246+
- opcode = misaligned_p ? "vmovdqu32" : "vmovdqa32";
247+
+ opcode = "vmovdqu32";
248+
else
249+
- opcode = misaligned_p ? "%vmovdqu" : "%vmovdqa";
250+
+ opcode = "%vmovdqu";
251+
break;
252+
case E_DImode:
253+
case E_TImode:
254+
case E_OImode:
255+
if (evex_reg_p)
256+
- opcode = misaligned_p ? "vmovdqu64" : "vmovdqa64";
257+
+ opcode = "vmovdqu64";
258+
else
259+
- opcode = misaligned_p ? "%vmovdqu" : "%vmovdqa";
260+
+ opcode = "%vmovdqu";
261+
break;
262+
case E_XImode:
263+
- opcode = misaligned_p ? "vmovdqu64" : "vmovdqa64";
264+
+ opcode = "vmovdqu64";
265+
break;
266+
default:
267+
gcc_unreachable ();

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