8351101: RISC-V: C2: Small improvement to MacroAssembler::revb

RealFYang · RealFYang · commit b1a21b563e3a · 2025-03-05T02:17:22.000Z
Reviewed-by: fjiang, mli
diff --git a/src/hotspot/cpu/riscv/macroAssembler_riscv.cpp b/src/hotspot/cpu/riscv/macroAssembler_riscv.cpp
@@ -2892,7 +2892,6 @@ void MacroAssembler::revb(Register Rd, Register Rs, Register tmp1, Register tmp2
     slli(tmp1, tmp1, 8);
   }
   srli(Rd, Rs, 56);
-  zext(Rd, Rd, 8);
   orr(Rd, tmp1, Rd);
 }
 

Original file line number	Diff line number	Diff line change
`@@ -2892,7 +2892,6 @@ void MacroAssembler::revb(Register Rd, Register Rs, Register tmp1, Register tmp2`
`2892`	`2892`	`slli(tmp1, tmp1, 8);`
`2893`	`2893`	`}`
`2894`	`2894`	`srli(Rd, Rs, 56);`
`2895`		`- zext(Rd, Rd, 8);`
`2896`	`2895`	`orr(Rd, tmp1, Rd);`
`2897`	`2896`	`}`
`2898`	`2897`