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Ferdinand Lemaire
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bump llvm to 29b92d07746fac26cd64c914bc9c5c3833974f6d
Signed-off-by: Ferdinand Lemaire <[email protected]>
1 parent e5901e2 commit 7a28cc9

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‎docs/BuildOnLinuxOSX.md

+1-1
Original file line numberDiff line numberDiff line change
@@ -15,7 +15,7 @@ Firstly, install MLIR (as a part of LLVM-Project):
1515
``` bash
1616
git clone -n https://github.com/llvm/llvm-project.git
1717
# Check out a specific branch that is known to work with ONNX-MLIR.
18-
cd llvm-project && git checkout eaa95a1c2bd38332c1a4e634595f29d22b28ffea && cd ..
18+
cd llvm-project && git checkout 29b92d07746fac26cd64c914bc9c5c3833974f6d && cd ..
1919
```
2020

2121
[same-as-file]: <> (utils/build-mlir.sh)

‎docs/BuildOnWindows.md

+1-1
Original file line numberDiff line numberDiff line change
@@ -52,7 +52,7 @@ Install MLIR (as a part of LLVM-Project):
5252
```shell
5353
git clone -n https://github.com/llvm/llvm-project.git
5454
# Check out a specific branch that is known to work with ONNX-MLIR.
55-
cd llvm-project && git checkout eaa95a1c2bd38332c1a4e634595f29d22b28ffea && cd ..
55+
cd llvm-project && git checkout 29b92d07746fac26cd64c914bc9c5c3833974f6d && cd ..
5656
```
5757

5858
[same-as-file]: <> (utils/build-mlir.cmd)

‎test/mlir/accelerators/nnpa/transform/zlow-stick-unstick-expansion.mlir

+29-30
Original file line numberDiff line numberDiff line change
@@ -14,9 +14,9 @@ func.func @test_stick_expansion_with_sat(%arg0: memref<16x8x128xf32>) -> memref<
1414
// CHECK-DAG: [[MAP_1_:#.+]] = affine_map<()[s0] -> (s0 * 64)>
1515
// CHECK-DAG: [[MAP_2_:#.+]] = affine_map<()[s0, s1] -> (s1 floordiv 64)>
1616
// CHECK-DAG: [[MAP_3_:#.+]] = affine_map<()[s0, s1] -> (s0 + s1)>
17-
// CHECK-DAG: [[MAP_4_:#.+]] = affine_map<()[s0, s1] -> (s1 + 8)>
18-
// CHECK-DAG: [[MAP_5_:#.+]] = affine_map<()[s0, s1] -> (s1 + 16)>
19-
// CHECK-DAG: [[MAP_6_:#.+]] = affine_map<()[s0, s1] -> (s1 + 24)>
17+
// CHECK-DAG: [[MAP_4_:#.+]] = affine_map<()[s0, s1] -> (s0 + 8)>
18+
// CHECK-DAG: [[MAP_5_:#.+]] = affine_map<()[s0, s1] -> (s0 + 16)>
19+
// CHECK-DAG: [[MAP_6_:#.+]] = affine_map<()[s0, s1] -> (s0 + 24)>
2020
// CHECK-LABEL: func.func @test_stick_expansion_with_sat
2121
// CHECK-SAME: ([[PARAM_0_:%.+]]: memref<16x8x128xf32>) -> memref<16x8x128xf16, #map> {
2222
// CHECK-DAG: [[CST_28_:%.+]] = arith.constant 28 : index
@@ -40,7 +40,7 @@ func.func @test_stick_expansion_with_sat(%arg0: memref<16x8x128xf32>) -> memref<
4040
// CHECK: krnl.prefetch [[PARAM_0_]]{{.}}[[VAR_1_]]#0, [[VAR_1_]]#1, [[VAR_2_]]{{.}}, read, locality<1>, data : memref<16x8x128xf32>
4141
// CHECK: krnl.prefetch [[RES_]]{{.}}[[VAR_1_]]#0, [[VAR_1_]]#1, [[VAR_2_]]{{.}}, write, locality<1>, data : memref<16x8x128xf16, #map>
4242
// CHECK: affine.for [[I_3_:%.+]] = 0 to 64 step 32 {
43-
// CHECK: [[VAR_5_:%.+]] = affine.apply [[MAP_3_]](){{.}}[[VAR_2_]], [[I_3_]]{{.}}
43+
// CHECK: [[VAR_5_:%.+]] = affine.apply [[MAP_3_]](){{.}}[[I_3_]], [[VAR_2_]]{{.}}
4444
// CHECK-DAG: [[LOAD_PARAM_0_MEM_:%.+]] = vector.load [[PARAM_0_]]{{.}}[[VAR_1_]]#0, [[VAR_1_]]#1, [[VAR_5_]]{{.}} : memref<16x8x128xf32>, vector<4xf32>
4545
// CHECK-DAG: [[VAR_7_:%.+]] = arith.addi [[VAR_5_]], [[CST_4_]] : index
4646
// CHECK-NOT: separator of consecutive DAGs
@@ -86,11 +86,11 @@ func.func @test_stick_expansion_with_sat(%arg0: memref<16x8x128xf32>) -> memref<
8686
// CHECK-DAG: [[VAR_39_:%.+]] = "zlow.vec_f32_to_dlf16"([[VAR_33_]], [[VAR_34_]]) : (vector<4xf32>, vector<4xf32>) -> vector<8xf16>
8787
// CHECK: [[VAR_40_:%.+]] = "zlow.vec_f32_to_dlf16"([[VAR_35_]], [[VAR_36_]]) : (vector<4xf32>, vector<4xf32>) -> vector<8xf16>
8888
// CHECK: vector.store [[VAR_37_]], [[VAR_reinterpret_cast_]]{{.}}[[VAR_4_]], [[I_3_]]{{.}} : memref<2x64xf16>, vector<8xf16>
89-
// CHECK: [[VAR_41_:%.+]] = affine.apply [[MAP_4_]](){{.}}[[VAR_2_]], [[I_3_]]{{.}}
89+
// CHECK: [[VAR_41_:%.+]] = affine.apply [[MAP_4_]](){{.}}[[I_3_]], [[VAR_2_]]{{.}}
9090
// CHECK: vector.store [[VAR_38_]], [[VAR_reinterpret_cast_]]{{.}}[[VAR_4_]], [[VAR_4_]]1] : memref<2x64xf16>, vector<8xf16>
91-
// CHECK: [[VAR_42_:%.+]] = affine.apply [[MAP_5_]](){{.}}[[VAR_2_]], [[I_3_]]{{.}}
91+
// CHECK: [[VAR_42_:%.+]] = affine.apply [[MAP_5_]](){{.}}[[I_3_]], [[VAR_2_]]{{.}}
9292
// CHECK: vector.store [[VAR_39_]], [[VAR_reinterpret_cast_]]{{.}}[[VAR_4_]], [[VAR_4_]]2] : memref<2x64xf16>, vector<8xf16>
93-
// CHECK: [[VAR_43_:%.+]] = affine.apply [[MAP_6_]](){{.}}[[VAR_2_]], [[I_3_]]{{.}}
93+
// CHECK: [[VAR_43_:%.+]] = affine.apply [[MAP_6_]](){{.}}[[I_3_]], [[VAR_2_]]{{.}}
9494
// CHECK: vector.store [[VAR_40_]], [[VAR_reinterpret_cast_]]{{.}}[[VAR_4_]], [[VAR_4_]]3] : memref<2x64xf16>, vector<8xf16>
9595
// CHECK: }
9696
// CHECK: }
@@ -112,9 +112,9 @@ func.func @test_stick_expansion_without_sat(%arg0: memref<16x8x128xf32>) -> memr
112112
// CHECK-DAG: [[MAP_1_:#.+]] = affine_map<()[s0] -> (s0 * 64)>
113113
// CHECK-DAG: [[MAP_2_:#.+]] = affine_map<()[s0, s1] -> (s1 floordiv 64)>
114114
// CHECK-DAG: [[MAP_3_:#.+]] = affine_map<()[s0, s1] -> (s0 + s1)>
115-
// CHECK-DAG: [[MAP_4_:#.+]] = affine_map<()[s0, s1] -> (s1 + 8)>
116-
// CHECK-DAG: [[MAP_5_:#.+]] = affine_map<()[s0, s1] -> (s1 + 16)>
117-
// CHECK-DAG: [[MAP_6_:#.+]] = affine_map<()[s0, s1] -> (s1 + 24)>
115+
// CHECK-DAG: [[MAP_4_:#.+]] = affine_map<()[s0, s1] -> (s0 + 8)>
116+
// CHECK-DAG: [[MAP_5_:#.+]] = affine_map<()[s0, s1] -> (s0 + 16)>
117+
// CHECK-DAG: [[MAP_6_:#.+]] = affine_map<()[s0, s1] -> (s0 + 24)>
118118
// CHECK-LABEL: func.func @test_stick_expansion_without_sat
119119
// CHECK-SAME: ([[PARAM_0_:%.+]]: memref<16x8x128xf32>) -> memref<16x8x128xf16, #map> {
120120
// CHECK-DAG: [[CST_28_:%.+]] = arith.constant 28 : index
@@ -136,7 +136,7 @@ func.func @test_stick_expansion_without_sat(%arg0: memref<16x8x128xf32>) -> memr
136136
// CHECK: krnl.prefetch [[PARAM_0_]]{{.}}[[VAR_1_]]#0, [[VAR_1_]]#1, [[VAR_2_]]{{.}}, read, locality<1>, data : memref<16x8x128xf32>
137137
// CHECK: krnl.prefetch [[RES_]]{{.}}[[VAR_1_]]#0, [[VAR_1_]]#1, [[VAR_2_]]{{.}}, write, locality<1>, data : memref<16x8x128xf16, #map>
138138
// CHECK: affine.for [[I_3_:%.+]] = 0 to 64 step 32 {
139-
// CHECK: [[VAR_5_:%.+]] = affine.apply [[MAP_3_]](){{.}}[[VAR_2_]], [[I_3_]]{{.}}
139+
// CHECK: [[VAR_5_:%.+]] = affine.apply [[MAP_3_]](){{.}}[[I_3_]], [[VAR_2_]]{{.}}
140140
// CHECK-DAG: [[LOAD_PARAM_0_MEM_:%.+]] = vector.load [[PARAM_0_]]{{.}}[[VAR_1_]]#0, [[VAR_1_]]#1, [[VAR_5_]]{{.}} : memref<16x8x128xf32>, vector<4xf32>
141141
// CHECK-DAG: [[VAR_7_:%.+]] = arith.addi [[VAR_5_]], [[CST_4_]] : index
142142
// CHECK-NOT: separator of consecutive DAGs
@@ -164,11 +164,11 @@ func.func @test_stick_expansion_without_sat(%arg0: memref<16x8x128xf32>) -> memr
164164
// CHECK-DAG: [[VAR_23_:%.+]] = "zlow.vec_f32_to_dlf16"([[LOAD_PARAM_0_MEM_4_]], [[LOAD_PARAM_0_MEM_5_]]) : (vector<4xf32>, vector<4xf32>) -> vector<8xf16>
165165
// CHECK: [[VAR_24_:%.+]] = "zlow.vec_f32_to_dlf16"([[LOAD_PARAM_0_MEM_6_]], [[LOAD_PARAM_0_MEM_7_]]) : (vector<4xf32>, vector<4xf32>) -> vector<8xf16>
166166
// CHECK: vector.store [[VAR_21_]], [[VAR_reinterpret_cast_]]{{.}}[[VAR_4_]], [[I_3_]]{{.}} : memref<2x64xf16>, vector<8xf16>
167-
// CHECK: [[VAR_25_:%.+]] = affine.apply [[MAP_4_]](){{.}}[[VAR_2_]], [[I_3_]]{{.}}
167+
// CHECK: [[VAR_25_:%.+]] = affine.apply [[MAP_4_]](){{.}}[[I_3_]], [[VAR_2_]]{{.}}
168168
// CHECK: vector.store [[VAR_22_]], [[VAR_reinterpret_cast_]]{{.}}[[VAR_4_]], [[VAR_25_]]{{.}} : memref<2x64xf16>, vector<8xf16>
169-
// CHECK: [[VAR_26_:%.+]] = affine.apply [[MAP_5_]](){{.}}[[VAR_2_]], [[I_3_]]{{.}}
169+
// CHECK: [[VAR_26_:%.+]] = affine.apply [[MAP_5_]](){{.}}[[I_3_]], [[VAR_2_]]{{.}}
170170
// CHECK: vector.store [[VAR_23_]], [[VAR_reinterpret_cast_]]{{.}}[[VAR_4_]], [[VAR_26_]]{{.}} : memref<2x64xf16>, vector<8xf16>
171-
// CHECK: [[VAR_27_:%.+]] = affine.apply [[MAP_6_]](){{.}}[[VAR_2_]], [[I_3_]]{{.}}
171+
// CHECK: [[VAR_27_:%.+]] = affine.apply [[MAP_6_]](){{.}}[[I_3_]], [[VAR_2_]]{{.}}
172172
// CHECK: vector.store [[VAR_24_]], [[VAR_reinterpret_cast_]]{{.}}[[VAR_4_]], [[VAR_27_]]{{.}} : memref<2x64xf16>, vector<8xf16>
173173
// CHECK: }
174174
// CHECK: }
@@ -196,7 +196,7 @@ func.func @test_unstick_expansion(%arg0: memref<16x8x128xf16, #map>) -> memref<1
196196
// CHECK-DAG: [[MAP_7_:#.+]] = affine_map<()[s0] -> (-s0 + 121)>
197197
// CHECK-DAG: [[MAP_8_:#.+]] = affine_map<()[s0] -> ((-s0) mod 8)>
198198
// CHECK-DAG: [[MAP_9_:#.+]] = affine_map<()[s0] -> (-s0 - (-s0) mod 8 + 128)>
199-
// CHECK-DAG: [[MAP_10_:#.+]] = affine_map<(d0)[s0, s1] -> (d0 + s0 + s1)>
199+
// CHECK-DAG: [[MAP_10_:#.+]] = affine_map<(d0)[s0, s1] -> (d0 + s1 + s0)>
200200
// CHECK-LABEL: func.func @test_unstick_expansion
201201
// CHECK-SAME: ([[PARAM_0_:%.+]]: memref<16x8x128xf16, #map>) -> memref<16x8x128xf32> {
202202
// CHECK-DAG: [[CST_1_:%.+]] = arith.constant 1 : index
@@ -232,52 +232,51 @@ func.func @test_unstick_expansion(%arg0: memref<16x8x128xf16, #map>) -> memref<1
232232
// CHECK-DAG: [[LOAD_VAR_reinterpret_cast_MEM_2_:%.+]] = vector.load [[VAR_reinterpret_cast_]]{{.}}[[VAR_4_]], [[VAR_8_]]{{.}} : memref<2x64xf16>, vector<8xf16>
233233
// CHECK-DAG: [[VAR_10_:%.+]] = affine.apply [[MAP_5_]]([[I_3_]])
234234
// CHECK: [[LOAD_VAR_reinterpret_cast_MEM_3_:%.+]] = vector.load [[VAR_reinterpret_cast_]]{{.}}[[VAR_4_]], [[VAR_10_]]{{.}} : memref<2x64xf16>, vector<8xf16>
235-
// CHECK: [[output1_:%.+]], [[VAR_output2_:%.+]] = "zlow.vec_dlf16_to_f32"([[LOAD_VAR_reinterpret_cast_MEM_]]) : (vector<8xf16>) -> (vector<4xf32>, vector<4xf32>)
236-
// CHECK: [[output1_0_:%.+]], [[VAR_output2_1_:%.+]] = "zlow.vec_dlf16_to_f32"([[LOAD_VAR_reinterpret_cast_MEM_1_]]) : (vector<8xf16>) -> (vector<4xf32>, vector<4xf32>)
237-
// CHECK: [[output1_2_:%.+]], [[VAR_output2_3_:%.+]] = "zlow.vec_dlf16_to_f32"([[LOAD_VAR_reinterpret_cast_MEM_2_]]) : (vector<8xf16>) -> (vector<4xf32>, vector<4xf32>)
238-
// CHECK: [[output1_4_:%.+]], [[VAR_output2_5_:%.+]] = "zlow.vec_dlf16_to_f32"([[LOAD_VAR_reinterpret_cast_MEM_3_]]) : (vector<8xf16>) -> (vector<4xf32>, vector<4xf32>)
235+
// CHECK: [[VAR_output1_:%.+]], [[VAR_output2_:%.+]] = "zlow.vec_dlf16_to_f32"([[LOAD_VAR_reinterpret_cast_MEM_]]) : (vector<8xf16>) -> (vector<4xf32>, vector<4xf32>)
236+
// CHECK: [[VAR_output1_0_:%.+]], [[VAR_output2_1_:%.+]] = "zlow.vec_dlf16_to_f32"([[LOAD_VAR_reinterpret_cast_MEM_1_]]) : (vector<8xf16>) -> (vector<4xf32>, vector<4xf32>)
237+
// CHECK: [[VAR_output1_2_:%.+]], [[VAR_output2_3_:%.+]] = "zlow.vec_dlf16_to_f32"([[LOAD_VAR_reinterpret_cast_MEM_2_]]) : (vector<8xf16>) -> (vector<4xf32>, vector<4xf32>)
238+
// CHECK: [[VAR_output1_4_:%.+]], [[VAR_output2_5_:%.+]] = "zlow.vec_dlf16_to_f32"([[LOAD_VAR_reinterpret_cast_MEM_3_]]) : (vector<8xf16>) -> (vector<4xf32>, vector<4xf32>)
239239
// CHECK: [[VAR_12_:%.+]] = affine.apply [[MAP_6_]]([[I_3_]]){{.}}[[VAR_2_]]{{.}}
240-
// CHECK: vector.store [[output1_]], [[RES_]]{{.}}[[VAR_1_]]#0, [[VAR_1_]]#1, [[VAR_1_]]2] : memref<16x8x128xf32>, vector<4xf32>
240+
// CHECK: vector.store [[VAR_output1_]], [[RES_]]{{.}}[[VAR_1_]]#0, [[VAR_1_]]#1, [[VAR_1_]]2] : memref<16x8x128xf32>, vector<4xf32>
241241
// CHECK: [[VAR_13_:%.+]] = arith.addi [[VAR_12_]], [[CST_4_]] : index
242242
// CHECK: vector.store [[VAR_output2_]], [[RES_]]{{.}}[[VAR_1_]]#0, [[VAR_1_]]#1, [[VAR_1_]]3] : memref<16x8x128xf32>, vector<4xf32>
243243
// CHECK: [[VAR_14_:%.+]] = arith.addi [[VAR_12_]], [[CST_8_]] : index
244-
// CHECK: vector.store [[output1_0_]], [[RES_]]{{.}}[[VAR_1_]]#0, [[VAR_1_]]#1, [[VAR_1_]]4] : memref<16x8x128xf32>, vector<4xf32>
244+
// CHECK: vector.store [[VAR_output1_0_]], [[RES_]]{{.}}[[VAR_1_]]#0, [[VAR_1_]]#1, [[VAR_1_]]4] : memref<16x8x128xf32>, vector<4xf32>
245245
// CHECK: [[VAR_15_:%.+]] = arith.addi [[VAR_12_]], [[CST_12_]] : index
246246
// CHECK: vector.store [[VAR_output2_1_]], [[RES_]]{{.}}[[VAR_1_]]#0, [[VAR_1_]]#1, [[VAR_1_]]5] : memref<16x8x128xf32>, vector<4xf32>
247247
// CHECK: [[VAR_16_:%.+]] = arith.addi [[VAR_12_]], [[CST_16_]] : index
248-
// CHECK: vector.store [[output1_2_]], [[RES_]]{{.}}[[VAR_1_]]#0, [[VAR_1_]]#1, [[VAR_1_]]6] : memref<16x8x128xf32>, vector<4xf32>
248+
// CHECK: vector.store [[VAR_output1_2_]], [[RES_]]{{.}}[[VAR_1_]]#0, [[VAR_1_]]#1, [[VAR_1_]]6] : memref<16x8x128xf32>, vector<4xf32>
249249
// CHECK: [[VAR_17_:%.+]] = arith.addi [[VAR_12_]], [[CST_20_]] : index
250250
// CHECK: vector.store [[VAR_output2_3_]], [[RES_]]{{.}}[[VAR_1_]]#0, [[VAR_1_]]#1, [[VAR_1_]]7] : memref<16x8x128xf32>, vector<4xf32>
251251
// CHECK: [[VAR_18_:%.+]] = arith.addi [[VAR_12_]], [[CST_24_]] : index
252-
// CHECK: vector.store [[output1_4_]], [[RES_]]{{.}}[[VAR_1_]]#0, [[VAR_1_]]#1, [[VAR_1_]]8] : memref<16x8x128xf32>, vector<4xf32>
252+
// CHECK: vector.store [[VAR_output1_4_]], [[RES_]]{{.}}[[VAR_1_]]#0, [[VAR_1_]]#1, [[VAR_1_]]8] : memref<16x8x128xf32>, vector<4xf32>
253253
// CHECK: [[VAR_19_:%.+]] = arith.addi [[VAR_12_]], [[CST_28_]] : index
254254
// CHECK: vector.store [[VAR_output2_5_]], [[RES_]]{{.}}[[VAR_1_]]#0, [[VAR_1_]]#1, [[VAR_1_]]9] : memref<16x8x128xf32>, vector<4xf32>
255255
// CHECK: }
256256
// CHECK: } else {
257257
// CHECK: [[LOAD_VAR_reinterpret_cast_MEM_4_:%.+]] = affine.apply [[MAP_7_]](){{.}}[[VAR_2_]]{{.}}
258258
// CHECK: scf.for [[I_4_:%.+]] = [[CST_0_]] to [[LOAD_VAR_reinterpret_cast_MEM_4_]] step [[CST_8_]] {
259259
// CHECK: [[LOAD_VAR_reinterpret_cast_MEM_5_:%.+]] = vector.load [[VAR_reinterpret_cast_]]{{.}}[[VAR_4_]], [[I_4_]]{{.}} : memref<2x64xf16>, vector<8xf16>
260-
// CHECK: [[output1_0_]], [[VAR_output2_1_1_:%.+]] = "zlow.vec_dlf16_to_f32"([[LOAD_VAR_reinterpret_cast_MEM_5_]]) : (vector<8xf16>) -> (vector<4xf32>, vector<4xf32>)
260+
// CHECK: [[VAR_output1_0_1_:%.+]], [[VAR_output2_1_1_:%.+]] = "zlow.vec_dlf16_to_f32"([[LOAD_VAR_reinterpret_cast_MEM_5_]]) : (vector<8xf16>) -> (vector<4xf32>, vector<4xf32>)
261261
// CHECK: [[VAR_10_1_:%.+]] = affine.apply [[MAP_6_]]([[I_4_]]){{.}}[[VAR_2_]]{{.}}
262-
// CHECK: vector.store [[output1_0_]], [[RES_]]{{.}}[[VAR_1_]]#0, [[VAR_1_]]#1, [[VAR_1_]]0] : memref<16x8x128xf32>, vector<4xf32>
262+
// CHECK: vector.store [[VAR_output1_0_1_]], [[RES_]]{{.}}[[VAR_1_]]#0, [[VAR_1_]]#1, [[VAR_1_]]0] : memref<16x8x128xf32>, vector<4xf32>
263263
// CHECK: [[LOAD_VAR_reinterpret_cast_MEM_3_:%.+]] = arith.addi [[VAR_10_1_]], [[CST_4_]] : index
264264
// CHECK: vector.store [[VAR_output2_1_1_]], [[RES_]]{{.}}[[VAR_1_]]#0, [[VAR_1_]]#1, [[VAR_1_]]1] : memref<16x8x128xf32>, vector<4xf32>
265265
// CHECK: }
266266
// CHECK-DAG: [[VAR_6_1_:%.+]] = affine.apply [[MAP_8_]](){{.}}[[VAR_2_]]{{.}}
267267
// CHECK-DAG: [[LOAD_VAR_reinterpret_cast_MEM_1_:%.+]] = affine.apply [[MAP_9_]](){{.}}[[VAR_2_]]{{.}}
268268
// CHECK: [[LOAD_VAR_reinterpret_cast_MEM_6_:%.+]] = vector.load [[VAR_reinterpret_cast_]]{{.}}[[VAR_4_]], [[LOAD_VAR_reinterpret_cast_MEM_1_]]{{.}} : memref<2x64xf16>, vector<8xf16>
269-
// CHECK: [[output1_]], [[VAR_output2_1_:%.+]] = "zlow.vec_dlf16_to_f32"([[LOAD_VAR_reinterpret_cast_MEM_6_]]) : (vector<8xf16>) -> (vector<4xf32>, vector<4xf32>)
269+
// CHECK: [[VAR_output1_1_:%.+]], [[VAR_output2_1_:%.+]] = "zlow.vec_dlf16_to_f32"([[LOAD_VAR_reinterpret_cast_MEM_6_]]) : (vector<8xf16>) -> (vector<4xf32>, vector<4xf32>)
270270
// CHECK: [[RES_1_:%.+]] = memref.alloca() {{.*}}: memref<8xf32>
271-
// CHECK: vector.store [[output1_]], [[RES_1_]]{{.}}[[CST_0_]]{{.}} : memref<8xf32>, vector<4xf32>
271+
// CHECK: vector.store [[VAR_output1_1_]], [[RES_1_]]{{.}}[[CST_0_]]{{.}} : memref<8xf32>, vector<4xf32>
272272
// CHECK: vector.store [[VAR_output2_1_]], [[RES_1_]]{{.}}[[CST_4_]]{{.}} : memref<8xf32>, vector<4xf32>
273273
// CHECK: scf.for [[I_5_:%.+]] = [[CST_0_]] to [[VAR_6_1_]] step [[CST_1_]] {
274274
// CHECK-DAG: [[LOAD_VAR_reinterpret_cast_MEM_5_:%.+]] = krnl.load [[RES_1_]]{{.}}[[I_5_]]{{.}} : memref<8xf32>
275-
// CHECK-DAG: [[VAR_10_2_:%.+]] = affine.apply [[MAP_10_]]([[I_5_]]){{.}}[[VAR_2_]], [[LOAD_VAR_reinterpret_cast_MEM_1_]]{{.}}
275+
// CHECK-DAG: [[VAR_10_2_:%.+]] = affine.apply [[MAP_10_]]([[I_5_]]){{.}}[[LOAD_VAR_reinterpret_cast_MEM_1_]], [[VAR_2_]]{{.}}
276276
// CHECK: krnl.store [[LOAD_VAR_reinterpret_cast_MEM_5_]], [[RES_]]{{.}}[[VAR_1_]]#0, [[VAR_1_]]#1, [[VAR_1_]]0] : memref<16x8x128xf32>
277277
// CHECK: }
278278
// CHECK: }
279279
// CHECK: }
280280
// CHECK: return [[RES_]] : memref<16x8x128xf32>
281281
// CHECK: }
282-
}
283-
282+
}

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