@@ -18,9 +18,9 @@ define float @foo1(float %a) {
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define float @foo2 (float %a ) {
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; CHECK-LABEL: @foo2(
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- ; CHECK-NEXT: [[B:%.*]] = fcmp ule float [[C :%.*]], 0.000000e+00
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- ; CHECK-NEXT: [[D :%.*]] = fcmp olt float [[C ]], 1.000000e+00
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- ; CHECK-NEXT: [[E:%.*]] = select i1 [[D ]], float [[C ]], float 1.000000e+00
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+ ; CHECK-NEXT: [[B:%.*]] = fcmp ule float [[A :%.*]], 0.000000e+00
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+ ; CHECK-NEXT: [[TMP1 :%.*]] = fcmp olt float [[A ]], 1.000000e+00
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+ ; CHECK-NEXT: [[E:%.*]] = select i1 [[TMP1 ]], float [[A ]], float 1.000000e+00
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; CHECK-NEXT: [[F:%.*]] = select i1 [[B]], float 0.000000e+00, float [[E]]
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; CHECK-NEXT: ret float [[F]]
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;
@@ -330,10 +330,7 @@ define i8 @strong_order_cmp_eq_ugt(i32 %a, i32 %b) {
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define i8 @strong_order_cmp_slt_sgt (i32 %a , i32 %b ) {
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; CHECK-LABEL: @strong_order_cmp_slt_sgt(
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- ; CHECK-NEXT: [[CMP_LT:%.*]] = icmp slt i32 [[A:%.*]], [[B:%.*]]
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- ; CHECK-NEXT: [[SEXT:%.*]] = sext i1 [[CMP_LT]] to i8
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- ; CHECK-NEXT: [[CMP_GT:%.*]] = icmp sgt i32 [[A]], [[B]]
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- ; CHECK-NEXT: [[SEL_GT:%.*]] = select i1 [[CMP_GT]], i8 1, i8 [[SEXT]]
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+ ; CHECK-NEXT: [[SEL_GT:%.*]] = call i8 @llvm.scmp.i8.i32(i32 [[A:%.*]], i32 [[B:%.*]])
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; CHECK-NEXT: ret i8 [[SEL_GT]]
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;
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%cmp.lt = icmp slt i32 %a , %b
@@ -345,10 +342,7 @@ define i8 @strong_order_cmp_slt_sgt(i32 %a, i32 %b) {
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define i8 @strong_order_cmp_ult_ugt (i32 %a , i32 %b ) {
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; CHECK-LABEL: @strong_order_cmp_ult_ugt(
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- ; CHECK-NEXT: [[CMP_LT:%.*]] = icmp ult i32 [[A:%.*]], [[B:%.*]]
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- ; CHECK-NEXT: [[SEXT:%.*]] = sext i1 [[CMP_LT]] to i8
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- ; CHECK-NEXT: [[CMP_GT:%.*]] = icmp ugt i32 [[A]], [[B]]
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- ; CHECK-NEXT: [[SEL_GT:%.*]] = select i1 [[CMP_GT]], i8 1, i8 [[SEXT]]
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+ ; CHECK-NEXT: [[SEL_GT:%.*]] = call i8 @llvm.ucmp.i8.i32(i32 [[A:%.*]], i32 [[B:%.*]])
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; CHECK-NEXT: ret i8 [[SEL_GT]]
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;
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%cmp.lt = icmp ult i32 %a , %b
@@ -360,10 +354,7 @@ define i8 @strong_order_cmp_ult_ugt(i32 %a, i32 %b) {
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define i8 @strong_order_cmp_sgt_slt (i32 %a , i32 %b ) {
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; CHECK-LABEL: @strong_order_cmp_sgt_slt(
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- ; CHECK-NEXT: [[CMP_GT:%.*]] = icmp sgt i32 [[A:%.*]], [[B:%.*]]
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- ; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP_GT]] to i8
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- ; CHECK-NEXT: [[CMP_LT:%.*]] = icmp slt i32 [[A]], [[B]]
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- ; CHECK-NEXT: [[SEL_LT:%.*]] = select i1 [[CMP_LT]], i8 -1, i8 [[ZEXT]]
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+ ; CHECK-NEXT: [[SEL_LT:%.*]] = call i8 @llvm.scmp.i8.i32(i32 [[A:%.*]], i32 [[B:%.*]])
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; CHECK-NEXT: ret i8 [[SEL_LT]]
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;
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%cmp.gt = icmp sgt i32 %a , %b
@@ -375,10 +366,7 @@ define i8 @strong_order_cmp_sgt_slt(i32 %a, i32 %b) {
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define i8 @strong_order_cmp_ugt_ult (i32 %a , i32 %b ) {
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; CHECK-LABEL: @strong_order_cmp_ugt_ult(
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- ; CHECK-NEXT: [[CMP_GT:%.*]] = icmp ugt i32 [[A:%.*]], [[B:%.*]]
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- ; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP_GT]] to i8
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- ; CHECK-NEXT: [[CMP_LT:%.*]] = icmp ult i32 [[A]], [[B]]
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- ; CHECK-NEXT: [[SEL_LT:%.*]] = select i1 [[CMP_LT]], i8 -1, i8 [[ZEXT]]
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+ ; CHECK-NEXT: [[SEL_LT:%.*]] = call i8 @llvm.ucmp.i8.i32(i32 [[A:%.*]], i32 [[B:%.*]])
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; CHECK-NEXT: ret i8 [[SEL_LT]]
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;
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%cmp.gt = icmp ugt i32 %a , %b
@@ -460,8 +448,7 @@ define i8 @strong_order_cmp_ugt_ult_zext_not_oneuse(i32 %a, i32 %b) {
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; CHECK-NEXT: [[CMP_GT:%.*]] = icmp ugt i32 [[A:%.*]], [[B:%.*]]
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP_GT]] to i8
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; CHECK-NEXT: call void @use8(i8 [[ZEXT]])
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- ; CHECK-NEXT: [[CMP_LT:%.*]] = icmp ult i32 [[A]], [[B]]
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- ; CHECK-NEXT: [[SEL_LT:%.*]] = select i1 [[CMP_LT]], i8 -1, i8 [[ZEXT]]
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+ ; CHECK-NEXT: [[SEL_LT:%.*]] = call i8 @llvm.ucmp.i8.i32(i32 [[A]], i32 [[B]])
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; CHECK-NEXT: ret i8 [[SEL_LT]]
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;
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%cmp.gt = icmp ugt i32 %a , %b
@@ -477,8 +464,7 @@ define i8 @strong_order_cmp_slt_sgt_sext_not_oneuse(i32 %a, i32 %b) {
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; CHECK-NEXT: [[CMP_LT:%.*]] = icmp slt i32 [[A:%.*]], [[B:%.*]]
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; CHECK-NEXT: [[SEXT:%.*]] = sext i1 [[CMP_LT]] to i8
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; CHECK-NEXT: call void @use8(i8 [[SEXT]])
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- ; CHECK-NEXT: [[CMP_GT:%.*]] = icmp sgt i32 [[A]], [[B]]
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- ; CHECK-NEXT: [[SEL_GT:%.*]] = select i1 [[CMP_GT]], i8 1, i8 [[SEXT]]
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+ ; CHECK-NEXT: [[SEL_GT:%.*]] = call i8 @llvm.scmp.i8.i32(i32 [[A]], i32 [[B]])
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; CHECK-NEXT: ret i8 [[SEL_GT]]
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;
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%cmp.lt = icmp slt i32 %a , %b
@@ -491,10 +477,7 @@ define i8 @strong_order_cmp_slt_sgt_sext_not_oneuse(i32 %a, i32 %b) {
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define <2 x i8 > @strong_order_cmp_ugt_ult_vector (<2 x i32 > %a , <2 x i32 > %b ) {
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; CHECK-LABEL: @strong_order_cmp_ugt_ult_vector(
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- ; CHECK-NEXT: [[CMP_GT:%.*]] = icmp ugt <2 x i32> [[A:%.*]], [[B:%.*]]
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- ; CHECK-NEXT: [[ZEXT:%.*]] = zext <2 x i1> [[CMP_GT]] to <2 x i8>
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- ; CHECK-NEXT: [[CMP_LT:%.*]] = icmp ult <2 x i32> [[A]], [[B]]
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- ; CHECK-NEXT: [[SEL_LT:%.*]] = select <2 x i1> [[CMP_LT]], <2 x i8> <i8 -1, i8 -1>, <2 x i8> [[ZEXT]]
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+ ; CHECK-NEXT: [[SEL_LT:%.*]] = call <2 x i8> @llvm.ucmp.v2i8.v2i32(<2 x i32> [[A:%.*]], <2 x i32> [[B:%.*]])
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; CHECK-NEXT: ret <2 x i8> [[SEL_LT]]
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;
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%cmp.gt = icmp ugt <2 x i32 > %a , %b
@@ -506,10 +489,7 @@ define <2 x i8> @strong_order_cmp_ugt_ult_vector(<2 x i32> %a, <2 x i32> %b) {
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define <2 x i8 > @strong_order_cmp_ugt_ult_vector_poison (<2 x i32 > %a , <2 x i32 > %b ) {
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; CHECK-LABEL: @strong_order_cmp_ugt_ult_vector_poison(
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- ; CHECK-NEXT: [[CMP_GT:%.*]] = icmp ugt <2 x i32> [[A:%.*]], [[B:%.*]]
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- ; CHECK-NEXT: [[ZEXT:%.*]] = zext <2 x i1> [[CMP_GT]] to <2 x i8>
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- ; CHECK-NEXT: [[CMP_LT:%.*]] = icmp ult <2 x i32> [[A]], [[B]]
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- ; CHECK-NEXT: [[SEL_LT:%.*]] = select <2 x i1> [[CMP_LT]], <2 x i8> <i8 poison, i8 -1>, <2 x i8> [[ZEXT]]
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+ ; CHECK-NEXT: [[SEL_LT:%.*]] = call <2 x i8> @llvm.ucmp.v2i8.v2i32(<2 x i32> [[A:%.*]], <2 x i32> [[B:%.*]])
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; CHECK-NEXT: ret <2 x i8> [[SEL_LT]]
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;
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%cmp.gt = icmp ugt <2 x i32 > %a , %b
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