45
45
//--------------------------------------------------------------------+
46
46
// MACRO TYPEDEF CONSTANT ENUM DECLARATION
47
47
//--------------------------------------------------------------------+
48
+ enum {
49
+ PIPE_COUNT = 10 ,
50
+ };
48
51
49
52
TU_ATTR_PACKED_BEGIN
50
53
TU_ATTR_BIT_FIELD_ORDER_BEGIN
@@ -75,7 +78,7 @@ TU_ATTR_BIT_FIELD_ORDER_END
75
78
typedef struct
76
79
{
77
80
bool need_reset ; /* The device has not been reset after connection. */
78
- pipe_state_t pipe [10 ];
81
+ pipe_state_t pipe [PIPE_COUNT ];
79
82
uint8_t ep [4 ][2 ][15 ]; /* a lookup table for a pipe index from an endpoint address */
80
83
uint8_t ctl_mps [5 ]; /* EP0 max packet size for each device */
81
84
} hcd_data_t ;
@@ -86,46 +89,30 @@ typedef struct
86
89
static hcd_data_t _hcd ;
87
90
88
91
// TODO merged with DCD
89
- // Transfer conditions specifiable for each pipe:
92
+ // Transfer conditions specifiable for each pipe for most MCUs
90
93
// - Pipe 0: Control transfer with 64-byte single buffer
91
- // - Pipes 1 and 2: Bulk isochronous transfer continuous transfer mode with programmable buffer size up
92
- // to 2 KB and optional double buffer
93
- // - Pipes 3 to 5: Bulk transfer continuous transfer mode with programmable buffer size up to 2 KB and
94
- // optional double buffer
95
- // - Pipes 6 to 9: Interrupt transfer with 64-byte single buffer
96
- enum {
97
- PIPE_1ST_BULK = 3 ,
98
- PIPE_1ST_INTERRUPT = 6 ,
99
- PIPE_COUNT = 10 ,
100
- };
101
-
102
- static unsigned find_pipe (unsigned xfer ) {
103
- switch ( xfer ) {
104
- case TUSB_XFER_ISOCHRONOUS :
105
- for (int i = 1 ; i < PIPE_1ST_BULK ; ++ i ) {
106
- if ( 0 == _hcd .pipe [i ].ep ) return i ;
107
- }
108
- break ;
109
-
110
- case TUSB_XFER_BULK :
111
- for (int i = PIPE_1ST_BULK ; i < PIPE_1ST_INTERRUPT ; ++ i ) {
112
- if ( 0 == _hcd .pipe [i ].ep ) return i ;
113
- }
114
- for (int i = 1 ; i < PIPE_1ST_BULK ; ++ i ) {
115
- if ( 0 == _hcd .pipe [i ].ep ) return i ;
116
- }
117
- break ;
94
+ // - Pipes 1 and 2: Bulk or ISO
95
+ // - Pipes 3 to 5: Bulk
96
+ // - Pipes 6 to 9: Interrupt
97
+ //
98
+ // Note: for small mcu such as
99
+ // - RA2A1: only pipe 4-7 are available, and no support for ISO
100
+ static unsigned find_pipe (unsigned xfer_type ) {
101
+ const uint8_t pipe_idx_arr [4 ][2 ] = {
102
+ { 0 , 0 }, // Control
103
+ { 1 , 2 }, // Isochronous
104
+ { 1 , 5 }, // Bulk
105
+ { 6 , 9 }, // Interrupt
106
+ };
118
107
119
- case TUSB_XFER_INTERRUPT :
120
- for (int i = PIPE_1ST_INTERRUPT ; i < PIPE_COUNT ; ++ i ) {
121
- if ( 0 == _hcd .pipe [i ].ep ) return i ;
122
- }
123
- break ;
108
+ // find backward since only pipe 1, 2 support ISO
109
+ const uint8_t idx_first = pipe_idx_arr [xfer_type ][0 ];
110
+ const uint8_t idx_last = pipe_idx_arr [xfer_type ][1 ];
124
111
125
- default :
126
- /* No support for control transfer */
127
- break ;
112
+ for (int i = idx_last ; i >= idx_first ; i -- ) {
113
+ if (0 == _hcd .pipe [i ].ep ) return i ;
128
114
}
115
+
129
116
return 0 ;
130
117
}
131
118
@@ -718,7 +705,7 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
718
705
}
719
706
720
707
rusb -> PIPECFG = cfg ;
721
- rusb -> BRDYSTS = 0x1FFu ^ TU_BIT (num );
708
+ rusb -> BRDYSTS = 0x3FFu ^ TU_BIT (num );
722
709
rusb -> NRDYENB |= TU_BIT (num );
723
710
rusb -> BRDYENB |= TU_BIT (num );
724
711
@@ -846,14 +833,10 @@ void hcd_int_handler(uint8_t rhport, bool in_isr) {
846
833
unsigned s = rusb -> BRDYSTS & m ;
847
834
/* clear active bits (don't write 0 to already cleared bits according to the HW manual) */
848
835
rusb -> BRDYSTS = ~s ;
849
- while (s ) {
850
- #if defined(__CCRX__ )
851
- const unsigned num = Mod37BitPosition [(- s & s ) % 37 ];
852
- #else
853
- const unsigned num = __builtin_ctz (s );
854
- #endif
855
- process_pipe_brdy (rhport , num );
856
- s &= ~TU_BIT (num );
836
+ for (unsigned p = 0 ; p < PIPE_COUNT ; ++ p ) {
837
+ if (tu_bit_test (s , p )) {
838
+ process_pipe_brdy (rhport , p );
839
+ }
857
840
}
858
841
}
859
842
}
0 commit comments