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Merge pull request #2362 from dragonlock2/master
Add CH32V20x USB OTG/FS Driver
2 parents ccc7a36 + 10b1e38 commit a068b81

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‎.github/workflows/ci_set_matrix.py

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Original file line numberDiff line numberDiff line change
@@ -7,14 +7,14 @@
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"arm-iar": "",
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"arm-gcc": "",
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"msp430-gcc": "http://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/MSPGCC/9_2_0_0/export/msp430-gcc-9.2.0.50_linux64.tar.bz2",
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"riscv-gcc": "https://github.com/xpack-dev-tools/riscv-none-embed-gcc-xpack/releases/download/v10.1.0-1.1/xpack-riscv-none-embed-gcc-10.1.0-1.1-linux-x64.tar.gz",
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"riscv-gcc": "https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack/releases/download/v13.2.0-2/xpack-riscv-none-elf-gcc-13.2.0-2-linux-x64.tar.gz"
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}
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# family: [supported toolchain]
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family_list = {
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"broadcom_32bit": ["arm-gcc"],
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"broadcom_64bit": ["aarch64-gcc"],
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"ch32v307 fomu gd32vf103": ["riscv-gcc"],
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"ch32v20x ch32v307 fomu gd32vf103": ["riscv-gcc"],
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"imxrt": ["arm-gcc", "arm-clang"],
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"kinetis_k kinetis_kl kinetis_k32l2": ["arm-gcc", "arm-clang"],
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"lpc11 lpc13 lpc15": ["arm-gcc", "arm-clang"],

‎.gitignore

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@@ -82,6 +82,7 @@ hw/mcu/st/stm32l5xx_hal_driver
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hw/mcu/st/stm32u5xx_hal_driver
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hw/mcu/st/stm32wbxx_hal_driver
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hw/mcu/ti
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hw/mcu/wch/ch32v20x
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hw/mcu/wch/ch32v307
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hw/mcu/wch/ch32f20x
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lib/CMSIS_5

‎.idea/cmake.xml

+5-1
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‎README.rst

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@@ -157,7 +157,7 @@ Following CPUs are supported, check out `Supported Devices`_ for comprehensive l
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+--------------+------------------------------------------------------------+
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| ValentyUSB | eptri |
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+--------------+------------------------------------------------------------+
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| WCH | CH32F20x, CH32V307, |
160+
| WCH | CH32F20x, CH32V20x, CH32V307 |
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+--------------+------------------------------------------------------------+
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License

‎docs/reference/dependencies.rst

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@@ -55,6 +55,7 @@ hw/mcu/st/stm32u5xx_hal_driver https://github.com/STMicroelectronics/
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hw/mcu/st/stm32wbxx_hal_driver https://github.com/STMicroelectronics/stm32wbxx_hal_driver.git 2c5f06638be516c1b772f768456ba637f077bac8 stm32wb
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hw/mcu/ti https://github.com/hathach/ti_driver.git 143ed6cc20a7615d042b03b21e070197d473e6e5 msp430 msp432e4 tm4c123
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hw/mcu/wch/ch32f20x https://github.com/openwch/ch32f20x.git 77c4095087e5ed2c548ec9058e655d0b8757663b ch32f20x
58+
hw/mcu/wch/ch32v20x https://github.com/openwch/ch32v20x.git de6d68c654340d7f27b00cebbfc9aa2740a1abc2 ch32v20x
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hw/mcu/wch/ch32v307 https://github.com/openwch/ch32v307.git 17761f5cf9dbbf2dcf665b7c04934188add20082 ch32v307
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lib/CMSIS_5 https://github.com/ARM-software/CMSIS_5.git 20285262657d1b482d132d20d755c8c330d55c1f imxrt kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf ra saml2xstm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 stm32h7 stm32l0 stm32l1 stm32l4 stm32l5 stm32u5 stm32wb
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lib/FreeRTOS-Kernel https://github.com/FreeRTOS/FreeRTOS-Kernel.git 4ff01a7a4a51f53b44496aefee1e3c0071b7b173 all

‎docs/reference/supported.rst

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@@ -128,9 +128,9 @@ Supported MCUs
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+--------------+-----------------------+--------+------+-----------+-------------------+--------------+
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| ValentyUSB | eptri | ✔ | ✖ | ✖ | eptri | |
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+--------------+-----------------------+--------+------+-----------+-------------------+--------------+
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| WCH | CH32V307 | ✔ | | ✔ | ch32v307 | |
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| +-----------------------+--------+------+-----------+-------------------+--------------+
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| | CH32F20x | ✔ | | ✔ | ch32f205 | |
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| WCH | CH32F20x | ✔ | | ✔ | ch32f205 | |
132+
| | CH32V20x | ✔ | | ✖ | ch32v20x | |
133+
| | CH32V307 | ✔ | | ✔ | ch32v307 | |
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+--------------+-----------------------+--------+------+-----------+-------------------+--------------+
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‎examples/build_system/cmake/cpu/rv32i-ilp32.cmake

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@@ -1,13 +1,13 @@
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if (TOOLCHAIN STREQUAL "gcc")
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set(TOOLCHAIN_COMMON_FLAGS
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-march=rv32i
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-march=rv32i_zicsr
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-mabi=ilp32
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)
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set(FREERTOS_PORT GCC_RISC_V CACHE INTERNAL "")
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elseif (TOOLCHAIN STREQUAL "clang")
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set(TOOLCHAIN_COMMON_FLAGS
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-march=rv32i
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-march=rv32i_zicsr
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-mabi=ilp32
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)
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set(FREERTOS_PORT GCC_RISC_V CACHE INTERNAL "")

‎examples/build_system/cmake/cpu/rv32imac-ilp32.cmake

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@@ -1,13 +1,13 @@
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if (TOOLCHAIN STREQUAL "gcc")
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set(TOOLCHAIN_COMMON_FLAGS
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-march=rv32imac
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-march=rv32imac_zicsr
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-mabi=ilp32
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)
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set(FREERTOS_PORT GCC_RISC_V CACHE INTERNAL "")
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elseif (TOOLCHAIN STREQUAL "clang")
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set(TOOLCHAIN_COMMON_FLAGS
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-march=rv32imac
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-march=rv32imac_zicsr
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-mabi=ilp32
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)
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set(FREERTOS_PORT GCC_RISC_V CACHE INTERNAL "")

‎examples/build_system/cmake/toolchain/riscv_gcc.cmake

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@@ -1,15 +1,24 @@
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# default Toolchain from https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack
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if (NOT DEFINED CROSS_COMPILE)
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set(CROSS_COMPILE "riscv-none-elf-")
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endif ()
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if (NOT DEFINED CMAKE_C_COMPILER)
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set(CMAKE_C_COMPILER ${CROSS_COMPILE}gcc)
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endif ()
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if (NOT DEFINED CMAKE_C_COMPILER)
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set(CMAKE_C_COMPILER "riscv-none-embed-gcc")
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set(CMAKE_C_COMPILER ${CROSS_COMPILE}gcc)
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endif ()
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if (NOT DEFINED CMAKE_CXX_COMPILER)
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set(CMAKE_CXX_COMPILER "riscv-none-embed-g++")
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set(CMAKE_CXX_COMPILER ${CROSS_COMPILE}g++)
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endif ()
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set(CMAKE_ASM_COMPILER ${CMAKE_C_COMPILER})
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set(CMAKE_SIZE "riscv-none-embed-size" CACHE FILEPATH "")
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set(CMAKE_OBJCOPY "riscv-none-embed-objcopy" CACHE FILEPATH "")
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set(CMAKE_OBJDUMP "riscv-none-embed-objdump" CACHE FILEPATH "")
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set(CMAKE_SIZE ${CROSS_COMPILE}size CACHE FILEPATH "")
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set(CMAKE_OBJCOPY ${CROSS_COMPILE}objcopy CACHE FILEPATH "")
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set(CMAKE_OBJDUMP ${CROSS_COMPILE}objdump CACHE FILEPATH "")
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include(${CMAKE_CURRENT_LIST_DIR}/common.cmake)
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‎examples/build_system/make/cpu/rv32i-ilp32.mk

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@@ -1,12 +1,15 @@
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ifeq ($(TOOLCHAIN),gcc)
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CFLAGS += \
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-march=rv32i \
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-march=rv32i_zicsr \
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-mabi=ilp32 \
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6-
else ifeq ($(TOOLCHAIN),iar)
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#CFLAGS += --cpu cortex-a53
8-
#ASFLAGS += --cpu cortex-a53
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else ifeq ($(TOOLCHAIN),clang)
7+
CFLAGS += \
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-march=rv32i_zicsr \
9+
-mabi=ilp32 \
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else ifeq ($(TOOLCHAIN),iar)
12+
$(error not support)
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endif
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# For freeRTOS port source

‎examples/build_system/make/cpu/rv32imac-ilp32.mk

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@@ -1,11 +1,15 @@
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ifeq ($(TOOLCHAIN),gcc)
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CFLAGS += \
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-march=rv32imac \
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-march=rv32imac_zicsr \
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-mabi=ilp32 \
5+
6+
else ifeq ($(TOOLCHAIN),clang)
7+
CFLAGS += \
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-march=rv32imac_zicsr \
49
-mabi=ilp32 \
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611
else ifeq ($(TOOLCHAIN),iar)
7-
#CFLAGS += --cpu cortex-a53
8-
#ASFLAGS += --cpu cortex-a53
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$(error not support)
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endif
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‎examples/build_system/make/rules.mk

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@@ -134,6 +134,17 @@ OPENOCD_OPTION ?=
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flash-openocd: $(BUILD)/$(PROJECT).elf
135135
openocd $(OPENOCD_OPTION) -c "program $< verify reset exit"
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137+
# --------------- openocd-wch -----------------
138+
# wch-linke is not supported yet in official openOCD yet. We need to either use
139+
# 1. download openocd as part of mounriver studio http://www.mounriver.com/download or
140+
# 2. compiled from https://github.com/hathach/riscv-openocd-wch or
141+
# https://github.com/dragonlock2/miscboards/blob/main/wch/SDK/riscv-openocd.tar.xz
142+
# with ./configure --disable-werror --enable-wlinke --enable-ch347=no
143+
OPENOCD_WCH ?= /home/${USER}/app/riscv-openocd-wch/src/openocd
144+
OPENOCD_WCH_OPTION ?=
145+
flash-openocd-wch: $(BUILD)/$(PROJECT).elf
146+
$(OPENOCD_WCH) $(OPENOCD_WCH_OPTION) -c init -c halt -c "flash write_image $<" -c reset -c exit
147+
137148
# --------------- dfu-util -----------------
138149
DFU_UTIL_OPTION ?= -a 0
139150
flash-dfu-util: $(BUILD)/$(PROJECT).bin

‎examples/device/audio_4_channel_mic_freertos/skip.txt

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@@ -1,3 +1,4 @@
1+
mcu:CH32V20X
12
mcu:CH32V307
23
mcu:CXD56
34
mcu:F1C100S

‎examples/device/audio_test_freertos/skip.txt

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@@ -1,3 +1,4 @@
1+
mcu:CH32V20X
12
mcu:CH32V307
23
mcu:CXD56
34
mcu:F1C100S

‎examples/device/cdc_msc_freertos/skip.txt

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@@ -1,3 +1,4 @@
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mcu:CH32V20X
12
mcu:CH32V307
23
mcu:CXD56
34
mcu:F1C100S

‎examples/device/hid_composite_freertos/skip.txt

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@@ -1,3 +1,4 @@
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mcu:CH32V20X
12
mcu:CH32V307
23
mcu:CXD56
34
mcu:F1C100S

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