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lines changed Original file line number Diff line number Diff line change @@ -1358,6 +1358,9 @@ void CPU::NewRec::Compiler::CompileBranchDelaySlot(bool dirty_pc /* = true */)
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// Update load delay at the end of the previous instruction.
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UpdateLoadDelay ();
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+ // Don't need the branch instruction's inputs.
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+ ClearHostRegsNeeded ();
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+
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// TODO: Move cycle add before this.
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inst++;
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iinfo++;
@@ -1500,7 +1503,18 @@ void CPU::NewRec::Compiler::CompileTemplate(void (Compiler::*const_func)(Compile
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UpdateHostRegCounters ();
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if (tflags & TF_CAN_SWAP_DELAY_SLOT && TrySwapDelaySlot (cf.MipsS (), cf.MipsT ()))
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+ {
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+ // CompileBranchDelaySlot() clears needed, so need to reset.
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cf.delay_slot_swapped = true ;
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+ if (tflags & TF_READS_S)
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+ MarkRegsNeeded (HR_TYPE_CPU_REG, rs);
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+ if (tflags & TF_READS_T)
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+ MarkRegsNeeded (HR_TYPE_CPU_REG, rt);
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+ if (tflags & TF_READS_LO)
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+ MarkRegsNeeded (HR_TYPE_CPU_REG, Reg::lo);
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+ if (tflags & TF_READS_HI)
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+ MarkRegsNeeded (HR_TYPE_CPU_REG, Reg::hi);
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+ }
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if (tflags & TF_READS_S &&
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(tflags & TF_NEEDS_REG_S || !cf.const_s || (tflags & TF_WRITES_D && rd != Reg::zero && rd == rs)))
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