i16x8.q15rmul_sat_s instruction

Author: Maratyszcza

proposals/simd/BinarySIMD.md

@@ -162,6 +162,7 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive).
 | `i16x8.max_s`              |    `0x98`| -                  |
 | `i16x8.max_u`              |    `0x99`| -                  |
 | `i16x8.avgr_u`             |    `0x9b`|                    |
+| `i16x8.q15mulr_sat_s`      |    `0x9c`| -                  |
 | `i32x4.abs`                |    `0xa0`| -                  |
 | `i32x4.neg`                |    `0xa1`| -                  |
 | `i32x4.any_true`           |    `0xa2`| -                  |

proposals/simd/ImplementationStatus.md

@@ -130,6 +130,7 @@
 | `i16x8.max_s`              |               `-msimd128` | :heavy_check_mark: |                    |                    | :heavy_check_mark: |
 | `i16x8.max_u`              |               `-msimd128` | :heavy_check_mark: |                    |                    | :heavy_check_mark: |
 | `i16x8.avgr_u`             |               `-msimd128` | :heavy_check_mark: |                    |                    | :heavy_check_mark: |
+| `i16x8.q15mulr_sat_s`      |                           |                    |                    |                    |                    |
 | `i32x4.abs`                |               `-msimd128` | :heavy_check_mark: |                    |                    | :heavy_check_mark: |
 | `i32x4.neg`                |               `-msimd128` | :heavy_check_mark: |                    |                    | :heavy_check_mark: |
 | `i32x4.any_true`           |               `-msimd128` | :heavy_check_mark: |                    |                    | :heavy_check_mark: |

proposals/simd/NewOpcodes.md

@@ -106,6 +106,7 @@
 | i8x16.max_u          | 0x79   | i16x8.max_u              | 0x99   | i32x4.max_u              | 0xb9   | ----        | 0xd9   |
 | ---- avgr_s ----     | 0x7a   | ---- avgr_s ----         | 0x9a   | ---- avgr_s ----         | 0xba   | ----        | 0xda   |
 | i8x16.avgr_u         | 0x7b   | i16x8.avgr_u             | 0x9b   | ---- avgr_u ----         | 0xbb   | ----        | 0xdb   |
+| ----                 | 0x7c   | i16x8.q15mulr_sat_s      | 0x9c   | ----                     | 0xbc   | ----        | 0xdc   |
 
 | f32x4 Op        | opcode | f64x2 Op        | opcode |
 | --------------- | ------ | --------------- | ------ |

proposals/simd/SIMD.md

@@ -472,6 +472,19 @@ def S.sub_sat_u(a, b):
     return S.lanewise_binary(subsat, S.AsUnsigned(a), S.AsUnsigned(b))
 ```
 
+### Saturating integer Q-format rounding multiplication
+
+* `i16x8.q15mulr_sat_s(a: v128, b: v128) -> v128`
+
+Lane-wise saturating rounding multiplication in Q15 format:
+
+```python
+def S.q15mulr_sat_s(a, b):
+    def subq15mulr(x, y):
+        return S.SignedSaturate((x * y + 0x4000) >> 15)
+    return S.lanewise_binary(subsat, S.AsSigned(a), S.AsSigned(b))
+```
+
 ### Lane-wise integer minimum
 * `i8x16.min_s(a: v128, b: v128) -> v128`
 * `i8x16.min_u(a: v128, b: v128) -> v128`