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Add relaxed min and max (#36)
For #33.
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proposals/relaxed-simd/Overview.md

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@@ -205,6 +205,29 @@ def blend(a : v128, b : v128, m: v128, lanes : int):
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return result
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```
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### Relaxed min and max
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- `f32x4.min(a: v128, b: v128) -> v128`
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- `f32x4.max(a: v128, b: v128) -> v128`
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- `f64x2.min(a: v128, b: v128) -> v128`
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- `f64x2.max(a: v128, b: v128) -> v128`
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Return the lane-wise minimum or maximum of two values. If either values is NaN, or the values are -0.0 and +0.0, the return value is implementation-defined.
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```python
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def min_or_max(a : v128, b : v128, lanes : int, is_min : bool):
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result = []
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for i in range(lanes):
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if isNaN(a[i]) or isNaN(b[i]):
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result[i] = IMPLEMENTATION_DEFINED_ONE_OF(a[i], b[i])
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elif (a[i] == -0.0 && b[i] == +0.0) or (a[i] == +0.0 && b[i] == -0.0):
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result[i] = IMPLEMENTATION_DEFINED_ONE_OF(a[i], b[i])
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else:
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result[i] = is_min ? min(a, b) : max(a, b)
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```
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Where `IMPLEMENTATION_DEFINED_ONE_OF(x, y)` returns either `x` or `y`, depending on the implementation.
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## Binary format
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All opcodes have the `0xfd` prefix (same as SIMD proposal), which are omitted in the table below.
@@ -224,6 +247,10 @@ All opcodes have the `0xfd` prefix (same as SIMD proposal), which are omitted in
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| `i16x8.blend` | 0xb3 |
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| `i32x4.blend` | 0xd2 |
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| `i64x2.blend` | 0xd3 |
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| `f32x4.min` | 0xb4 |
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| `f32x4.max` | 0xe2 |
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| `f64x2.min` | 0xd4 |
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| `f64x2.max` | 0xee |
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Note: the opcodes are chosen to fit into the existing opcode space of the SIMD proposal, see [Binary encoding of SIMD](https://github.com/WebAssembly/simd/blob/main/proposals/simd/BinarySIMD.md), or a [table view of the same opcodes](https://github.com/WebAssembly/simd/blob/main/proposals/simd/NewOpcodes.md) for a list of existing opcodes.
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