Merge pull request #117 from Bill94l/memoryMapping

Dolu1990 · web-flow · commit d6115eb60503 · 2024-07-17T14:51:47.000+02:00
Updating the memory mapping for SocDemo
diff --git a/src/main/scala/naxriscv/platform/tilelinkdemo/SocDemo.scala b/src/main/scala/naxriscv/platform/tilelinkdemo/SocDemo.scala
@@ -75,7 +75,7 @@ class SocDemo(cpuCount : Int, withL2 : Boolean = true, asic : Boolean = false, x
         )
       )
     )
-    emulated.node at(0, 0x1000) of bus
+    emulated.node at(0, 0x10000000) of bus
 
     val custom = Fiber build new Area{
       val mei,sei = in Bool()

Original file line number	Diff line number	Diff line change
`@@ -75,7 +75,7 @@ class SocDemo(cpuCount : Int, withL2 : Boolean = true, asic : Boolean = false, x`
`75`	`75`	`)`
`76`	`76`	`)`
`77`	`77`	`)`
`78`		`- emulated.node at(0, 0x1000) of bus`
	`78`	`+ emulated.node at(0, 0x10000000) of bus`
`79`	`79`
`80`	`80`	`val custom = Fiber build new Area{`
`81`	`81`	`val mei,sei = in Bool()`