File tree 3 files changed +8
-9
lines changed
include/llvm/TargetParser 3 files changed +8
-9
lines changed Original file line number Diff line number Diff line change @@ -22715,22 +22715,22 @@ Value *CodeGenFunction::EmitRISCVCpuIs(StringRef CPUStr) {
22715
22715
return CPUID;
22716
22716
};
22717
22717
22718
- const llvm::RISCV::CPUModel CPUModel = llvm::RISCV::getCPUModel(CPUStr);
22718
+ const llvm::RISCV::CPUModel Model = llvm::RISCV::getCPUModel(CPUStr);
22719
22719
22720
22720
// Compare mvendorid.
22721
22721
Value *VendorID = loadRISCVCPUID(0);
22722
22722
Value *Result =
22723
- Builder.CreateICmpEQ(VendorID, Builder.getInt32(CPUModel .MVendorID));
22723
+ Builder.CreateICmpEQ(VendorID, Builder.getInt32(Model .MVendorID));
22724
22724
22725
22725
// Compare marchid.
22726
22726
Value *ArchID = loadRISCVCPUID(1);
22727
22727
Result = Builder.CreateAnd(
22728
- Result, Builder.CreateICmpEQ(ArchID, Builder.getInt64(CPUModel .MArchID)));
22728
+ Result, Builder.CreateICmpEQ(ArchID, Builder.getInt64(Model .MArchID)));
22729
22729
22730
22730
// Compare mimpid.
22731
22731
Value *ImpID = loadRISCVCPUID(2);
22732
22732
Result = Builder.CreateAnd(
22733
- Result, Builder.CreateICmpEQ(ImpID, Builder.getInt64(CPUModel .MImpID)));
22733
+ Result, Builder.CreateICmpEQ(ImpID, Builder.getInt64(Model .MImpID)));
22734
22734
22735
22735
return Result;
22736
22736
}
Original file line number Diff line number Diff line change @@ -43,7 +43,7 @@ struct CPUInfo {
43
43
StringLiteral DefaultMarch;
44
44
bool FastScalarUnalignedAccess;
45
45
bool FastVectorUnalignedAccess;
46
- CPUModel CPUModel ;
46
+ CPUModel Model ;
47
47
bool is64Bit () const { return DefaultMarch.starts_with (" rv64" ); }
48
48
};
49
49
Original file line number Diff line number Diff line change @@ -58,16 +58,15 @@ bool hasFastVectorUnalignedAccess(StringRef CPU) {
58
58
}
59
59
60
60
bool hasValidCPUModel (StringRef CPU) {
61
- const CPUModel CPUModel = getCPUModel (CPU);
62
- return CPUModel.MVendorID != 0 && CPUModel.MArchID != 0 &&
63
- CPUModel.MImpID != 0 ;
61
+ const CPUModel Model = getCPUModel (CPU);
62
+ return Model.MVendorID != 0 && Model.MArchID != 0 && Model.MImpID != 0 ;
64
63
}
65
64
66
65
CPUModel getCPUModel (StringRef CPU) {
67
66
const CPUInfo *Info = getCPUInfoByName (CPU);
68
67
if (!Info)
69
68
return {0 , 0 , 0 };
70
- return Info->CPUModel ;
69
+ return Info->Model ;
71
70
}
72
71
73
72
bool parseCPU (StringRef CPU, bool IsRV64) {
You can’t perform that action at this time.
0 commit comments