Skip to content

Commit 15c96d6

Browse files
[RISCV] Update unrelated bad code from test case
In llvm#131684, we found that the code generated a bnez zero, which is always false. Since this is unrelated to the regression the test case was added for, we change the IR here to avoid this test case from having this silly branching pattern. This will help this test case avoid any changes as we do work to optimize branches in the RISC-V backend.
1 parent 4474430 commit 15c96d6

File tree

1 file changed

+31
-31
lines changed

1 file changed

+31
-31
lines changed

llvm/test/CodeGen/RISCV/push-pop-opt-crash.ll

Lines changed: 31 additions & 31 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,4 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
12
; RUN: llc -mattr=+zcmp -verify-machineinstrs \
23
; RUN: -mtriple=riscv32 -target-abi=ilp32 < %s \
34
; RUN: | FileCheck %s -check-prefixes=RV32IZCMP
@@ -11,40 +12,39 @@
1112

1213
declare dso_local void @f1() local_unnamed_addr
1314
declare dso_local void @f2() local_unnamed_addr
14-
define dso_local void @f0() local_unnamed_addr {
15+
define dso_local void @f0(i1 %c) local_unnamed_addr {
1516
; RV32IZCMP-LABEL: f0:
16-
; RV32IZCMP: .cfi_startproc
17-
; RV32IZCMP-NEXT: # %bb.0: # %entry
18-
; RV32IZCMP-NEXT: bnez zero, .LBB0_2
19-
; RV32IZCMP-NEXT: # %bb.1: # %if.T
20-
; RV32IZCMP-NEXT: cm.push {ra}, -16
21-
; RV32IZCMP-NEXT: .cfi_def_cfa_offset 16
22-
; RV32IZCMP-NEXT: .cfi_offset ra, -4
23-
; RV32IZCMP-NEXT: call f1
24-
; RV32IZCMP-NEXT: cm.pop {ra}, 16
25-
; RV32IZCMP-NEXT: .cfi_restore ra
26-
; RV32IZCMP-NEXT: .cfi_def_cfa_offset 0
27-
; RV32IZCMP-NEXT: .LBB0_2: # %if.F
28-
; RV32IZCMP-NEXT: tail f2
29-
; RV32IZCMP-NEXT: .Lfunc_end0:
30-
17+
; RV32IZCMP: # %bb.0: # %entry
18+
; RV32IZCMP-NEXT: andi a0, a0, 1
19+
; RV32IZCMP-NEXT: beqz a0, .LBB0_2
20+
; RV32IZCMP-NEXT: # %bb.1: # %if.T
21+
; RV32IZCMP-NEXT: cm.push {ra}, -16
22+
; RV32IZCMP-NEXT: .cfi_def_cfa_offset 16
23+
; RV32IZCMP-NEXT: .cfi_offset ra, -4
24+
; RV32IZCMP-NEXT: call f1
25+
; RV32IZCMP-NEXT: cm.pop {ra}, 16
26+
; RV32IZCMP-NEXT: .cfi_restore ra
27+
; RV32IZCMP-NEXT: .cfi_def_cfa_offset 0
28+
; RV32IZCMP-NEXT: .LBB0_2: # %if.F
29+
; RV32IZCMP-NEXT: tail f2
30+
;
3131
; RV64IZCMP-LABEL: f0:
32-
; RV64IZCMP: .cfi_startproc
33-
; RV64IZCMP-NEXT: # %bb.0: # %entry
34-
; RV64IZCMP-NEXT: bnez zero, .LBB0_2
35-
; RV64IZCMP-NEXT: # %bb.1: # %if.T
36-
; RV64IZCMP-NEXT: cm.push {ra}, -16
37-
; RV64IZCMP-NEXT: .cfi_def_cfa_offset 16
38-
; RV64IZCMP-NEXT: .cfi_offset ra, -8
39-
; RV64IZCMP-NEXT: call f1
40-
; RV64IZCMP-NEXT: cm.pop {ra}, 16
41-
; RV64IZCMP-NEXT: .cfi_restore ra
42-
; RV64IZCMP-NEXT: .cfi_def_cfa_offset 0
43-
; RV64IZCMP-NEXT: .LBB0_2: # %if.F
44-
; RV64IZCMP-NEXT: tail f2
45-
; RV64IZCMP-NEXT: .Lfunc_end0:
32+
; RV64IZCMP: # %bb.0: # %entry
33+
; RV64IZCMP-NEXT: andi a0, a0, 1
34+
; RV64IZCMP-NEXT: beqz a0, .LBB0_2
35+
; RV64IZCMP-NEXT: # %bb.1: # %if.T
36+
; RV64IZCMP-NEXT: cm.push {ra}, -16
37+
; RV64IZCMP-NEXT: .cfi_def_cfa_offset 16
38+
; RV64IZCMP-NEXT: .cfi_offset ra, -8
39+
; RV64IZCMP-NEXT: call f1
40+
; RV64IZCMP-NEXT: cm.pop {ra}, 16
41+
; RV64IZCMP-NEXT: .cfi_restore ra
42+
; RV64IZCMP-NEXT: .cfi_def_cfa_offset 0
43+
; RV64IZCMP-NEXT: .LBB0_2: # %if.F
44+
; RV64IZCMP-NEXT: tail f2
45+
4646
entry:
47-
br i1 poison, label %if.T, label %if.F
47+
br i1 %c, label %if.T, label %if.F
4848

4949
if.T:
5050
tail call void @f1()

0 commit comments

Comments
 (0)