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#define UART_TX_DMA HPM_DMA_SRC_UART2_TX
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#define UART_TX_DMA_RESOURCE_INDEX (1U)
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- #define UART_TX_DMA_BUFFER_SIZE (8192U)
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+ // #define UART_TX_DMA_BUFFER_SIZE (8192U)
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- ATTR_PLACE_AT_NONCACHEABLE_BSS_WITH_ALIGNMENT (4 )
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- uint8_t uart_tx_buf [UART_TX_DMA_BUFFER_SIZE ];
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+ static uint32_t rb_write_pos = 0 ;
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+ // ATTR_PLACE_AT_NONCACHEABLE_BSS_WITH_ALIGNMENT(4)
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+ // uint8_t uart_tx_buf[UART_TX_DMA_BUFFER_SIZE];
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ATTR_PLACE_AT_NONCACHEABLE_BSS_WITH_ALIGNMENT (4 )
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uint8_t uart_rx_buf [UART_RX_DMA_BUFFER_COUNT ][UART_RX_DMA_BUFFER_SIZE ];
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ATTR_PLACE_AT_NONCACHEABLE_BSS_WITH_ALIGNMENT (8 )
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- dma_linked_descriptor_t rx_descriptors [UART_RX_DMA_BUFFER_COUNT - 1 ];
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+ dma_linked_descriptor_t rx_descriptors [UART_RX_DMA_BUFFER_COUNT ];
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static dma_resource_t dma_resource_pools [2 ];
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volatile uint32_t g_uart_tx_transfer_length = 0 ;
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static hpm_stat_t board_uart_dma_config (void );
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- static hpm_stat_t board_uart_rx_dma_restart (void );
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void dma_channel_tc_callback (DMA_Type * ptr , uint32_t channel , void * user_data )
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{
@@ -41,13 +41,10 @@ void dma_channel_tc_callback(DMA_Type *ptr, uint32_t channel, void *user_data)
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uint32_t link_addr = ptr -> CHCTRL [channel ].LLPOINTER ;
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uint32_t rx_desc_size = (sizeof (rx_descriptors ) / sizeof (dma_linked_descriptor_t ));
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if (rx_resource -> channel == channel ) {
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- if (link_addr == (uint32_t )NULL ) {
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- board_uart_rx_dma_restart ();
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- return ;
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- }
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for (i = 0 ; i < rx_desc_size ; i ++ ) {
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if (link_addr == core_local_mem_to_sys_address (BOARD_RUNNING_CORE , (uint32_t )& rx_descriptors [i ])) {
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- chry_ringbuffer_write (& g_uartrx , uart_rx_buf [i - 1 ], UART_RX_DMA_BUFFER_SIZE );
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+ chry_ringbuffer_write (& g_uartrx , & uart_rx_buf [i ][rb_write_pos ], UART_RX_DMA_BUFFER_SIZE - rb_write_pos );
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+ rb_write_pos = 0 ;
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}
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}
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}
@@ -69,8 +66,8 @@ void uart_isr(void)
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if (uart_received_data_count > 0 ) {
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for (i = 0 ; i < rx_desc_size ; i ++ ) {
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if (link_addr == core_local_mem_to_sys_address (BOARD_RUNNING_CORE , (uint32_t )& rx_descriptors [i ])) {
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- chry_ringbuffer_write (& g_uartrx , uart_rx_buf [i ], uart_received_data_count );
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- board_uart_rx_dma_restart () ;
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+ chry_ringbuffer_write (& g_uartrx , & uart_rx_buf [i ][ rb_write_pos ] , uart_received_data_count - rb_write_pos );
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+ rb_write_pos += uart_received_data_count - rb_write_pos ;
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break ;
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}
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}
@@ -79,6 +76,37 @@ void uart_isr(void)
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}
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SDK_DECLARE_EXT_ISR_M (UART_IRQ , uart_isr )
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+ void usb2uart_handler (void )
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+ {
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+ dma_resource_t * rx_resource = & dma_resource_pools [UART_RX_DMA_RESOURCE_INDEX ];
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+ const uint32_t rx_desc_size = (sizeof (rx_descriptors ) / sizeof (dma_linked_descriptor_t ));
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+ uint32_t uart_received_data_count = UART_RX_DMA_BUFFER_SIZE - dma_get_remaining_transfer_size (rx_resource -> base , rx_resource -> channel );
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+
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+ if ((uart_received_data_count - rb_write_pos ) > 0 )
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+ {
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+ uint32_t level = disable_global_irq (CSR_MSTATUS_MIE_MASK );
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+ uint32_t link_addr = rx_resource -> base -> CHCTRL [rx_resource -> channel ].LLPOINTER ;
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+
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+ /* data may be preempted by interrupts, need to reread the count */
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+ uart_received_data_count = UART_RX_DMA_BUFFER_SIZE - dma_get_remaining_transfer_size (rx_resource -> base , rx_resource -> channel );
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+
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+ if ((uart_received_data_count - rb_write_pos ) > 0 )
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+ {
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+ for (int i = 0 ; i < rx_desc_size ; i ++ )
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+ {
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+ if (link_addr == core_local_mem_to_sys_address (BOARD_RUNNING_CORE , (uint32_t )& rx_descriptors [i ]))
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+ {
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+ chry_ringbuffer_write (& g_uartrx , & uart_rx_buf [i ][rb_write_pos ], uart_received_data_count - rb_write_pos );
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+ rb_write_pos += uart_received_data_count - rb_write_pos ;
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+ break ;
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+ }
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+ }
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+ }
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+
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+ restore_global_irq (level );
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+ }
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+ }
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+
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void uartx_preinit (void )
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{
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// board_init_uart(UART_BASE);
@@ -131,18 +159,6 @@ void chry_dap_usb2uart_uart_send_bydma(uint8_t *data, uint16_t len)
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dma_mgr_enable_channel (tx_resource );
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}
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- static hpm_stat_t board_uart_rx_dma_restart (void )
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- {
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- dma_resource_t * resource = & dma_resource_pools [UART_RX_DMA_RESOURCE_INDEX ];
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- dma_mgr_disable_channel (resource );
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- uint32_t addr = core_local_mem_to_sys_address (BOARD_RUNNING_CORE , (uint32_t )uart_rx_buf [0 ]);
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- dma_mgr_set_chn_dst_addr (resource , addr );
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- addr = core_local_mem_to_sys_address (BOARD_RUNNING_CORE , (uint32_t )& rx_descriptors [0 ]);
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- resource -> base -> CHCTRL [resource -> channel ].LLPOINTER = addr ;
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- dma_mgr_set_chn_transize (resource , UART_RX_DMA_BUFFER_SIZE );
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- dma_mgr_enable_channel (resource );
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- return status_success ;
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- }
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static hpm_stat_t board_uart_dma_config (void )
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{
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dma_mgr_chn_conf_t chg_config ;
@@ -165,10 +181,10 @@ static hpm_stat_t board_uart_dma_config(void)
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chg_config .dmamux_src = UART_RX_DMA ;
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for (i = 0 ; i < rx_desc_size ; i ++ ) {
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if (i < (rx_desc_size - 1 )) {
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- chg_config .dst_addr = core_local_mem_to_sys_address (BOARD_RUNNING_CORE , (uint32_t )uart_rx_buf [i + 1 ]);
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- chg_config .linked_ptr = core_local_mem_to_sys_address (BOARD_RUNNING_CORE , (uint32_t )& rx_descriptors [i + 1 ]);
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+ chg_config .dst_addr = core_local_mem_to_sys_address (BOARD_RUNNING_CORE , (uint32_t )uart_rx_buf [i ]);
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+ chg_config .linked_ptr = core_local_mem_to_sys_address (BOARD_RUNNING_CORE , (uint32_t )& rx_descriptors [i ]);
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} else {
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- chg_config .dst_addr = core_local_mem_to_sys_address (BOARD_RUNNING_CORE , (uint32_t )uart_rx_buf [1 ]);
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+ chg_config .dst_addr = core_local_mem_to_sys_address (BOARD_RUNNING_CORE , (uint32_t )uart_rx_buf [0 ]);
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chg_config .linked_ptr = core_local_mem_to_sys_address (BOARD_RUNNING_CORE , (uint32_t )& rx_descriptors [0 ]);
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}
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if (dma_mgr_config_linked_descriptor (resource , & chg_config , (dma_mgr_linked_descriptor_t * )& rx_descriptors [i ]) != status_success ) {
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