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Commit 47a01e9

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Michael Voropanov
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Workaround for intended enum behaviour suggested in python/cpython#127375 (comment)
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2 files changed

+18
-8
lines changed

2 files changed

+18
-8
lines changed

src/lexer.py

+1-2
Original file line numberDiff line numberDiff line change
@@ -67,5 +67,4 @@ def lex_line(line, n):
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# this means its an argument or a typo
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pass
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print(line_code)
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print(line_code)

src/ops.py

+17-6
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,6 @@
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from enum import Enum
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33

4-
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class OpCodes(Enum):
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'''
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Class to tidy up where Opcodes are defined for 64-bit operations, first only essential opcodes will be implemented.
@@ -13,11 +12,18 @@ class OpCodes(Enum):
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EOR = 0xCA000000
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LSL = 0x9AC02000
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LSR = 0x9AC02400
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MOV = 0xAA0003E0 # This is actually an alias for ORR Xd, XZR, Xm e.g ORR X0, XZR, #5 | ORR X1, XZR, X0 for register to register
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B = 0x14000000
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BL = 0x94000000
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MOV = 0xAA0003E0 # This is actually an alias for ORR Xd, XZR, Xm e.g ORR X0, XZR, #5 | ORR X1, XZR, X0 for register to register
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B = 0x14000000
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BL = 0x94000000
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class Registers(Enum):
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def __new__(cls, *args):
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obj = object.__new__(cls)
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return obj
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# 64-bit Registers
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X0 = 0
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X1 = 1
@@ -50,5 +56,10 @@ class Registers(Enum):
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X28 = 28
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X29 = 29 # Frame pointer
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X30 = 30 # Link register
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SP = 31 # Stack pointer
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XZR = 32 # Zero register (when used as source)
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SP = ("SP", 31) # Stack pointer
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XZR = ("XZR", 31) # Zero register (when used as source)
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@property
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def register_number(self):
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return self._value_
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