From 1172506e3121c0007a9c85f2ee81bb897f5220d5 Mon Sep 17 00:00:00 2001
From: syedowaisalishah <alishahowais@gmail.com>
Date: Fri, 11 Apr 2025 02:22:37 +0000
Subject: [PATCH 01/15] Add CSR YAML files for Sscofpmf: scountovf

---
 arch/csr/Sscofpmf/scountovf.yaml | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)
 create mode 100644 arch/csr/Sscofpmf/scountovf.yaml

diff --git a/arch/csr/Sscofpmf/scountovf.yaml b/arch/csr/Sscofpmf/scountovf.yaml
new file mode 100644
index 000000000..82e1947f2
--- /dev/null
+++ b/arch/csr/Sscofpmf/scountovf.yaml
@@ -0,0 +1,28 @@
+# yaml-language-server: $schema=../../../schemas/csr_schema.json
+$schema: csr_schema.json#
+kind: csr
+name: scountovf
+long_name: Supervisor Count Overflow (scountovf) Register
+address: 0x700
+priv_mode: S
+length: 32
+definedBy: Sscofpmf
+description: |
+  The `scountovf` CSR is a 32-bit read-only register that contains shadow copies of the OF bits in the 29 `mhpmevent` CSRs (mhpmevent3 - mhpmevent31).
+  scountovf bit X corresponds to mhpmeventX.
+
+  This register enables supervisor-level overflow interrupt handler software to quickly and easily determine which counter(s) have overflowed
+  (without needing to make an execution environment call or series of calls ultimately up to M-mode).
+
+  Read access to bit X is subject to the same `mcounteren` (or `mcounteren` and `hcounteren`) CSRs that mediate access to the `hpmcounter` CSRs by S-mode (or VS-mode).
+  In M-mode, `scountovf` bit X is always readable. In S/HS-mode, `scountovf` bit X is readable when `mcounteren` bit X is set, and otherwise reads as zero.
+  Similarly, in VS-mode, `scountovf` bit X is readable when both `mcounteren` bit X and `hcounteren` bit X are set, and otherwise reads as zero.
+
+fields:
+  OF:
+    location_rv32: 31
+    location_rv64: 31
+    type: RO
+    description: |
+      Overflow status and interrupt disable bit that is set when the corresponding `hpmcounter` overflows.
+    reset_value: UNDEFINED_LEGAL

From 6adbfbb412e5c79d2b54143d4368a656bbdd6f92 Mon Sep 17 00:00:00 2001
From: syedowaisalishah <alishahowais@gmail.com>
Date: Wed, 16 Apr 2025 09:37:17 +0000
Subject: [PATCH 02/15] Add CSR YAML files for Sscofpmf: scountovf

---
 arch/csr/Sscofpmf/scountovf.yaml | 23 +++++++++++++----------
 1 file changed, 13 insertions(+), 10 deletions(-)

diff --git a/arch/csr/Sscofpmf/scountovf.yaml b/arch/csr/Sscofpmf/scountovf.yaml
index 82e1947f2..0af8d5461 100644
--- a/arch/csr/Sscofpmf/scountovf.yaml
+++ b/arch/csr/Sscofpmf/scountovf.yaml
@@ -8,21 +8,24 @@ priv_mode: S
 length: 32
 definedBy: Sscofpmf
 description: |
-  The `scountovf` CSR is a 32-bit read-only register that contains shadow copies of the OF bits in the 29 `mhpmevent` CSRs (mhpmevent3 - mhpmevent31).
-  scountovf bit X corresponds to mhpmeventX.
+  This extension adds the scountovf CSR, a 32-bit read-only
+  register that contains shadow copies of the OF bits in the 29 mhpmevent CSRs
+  (mhpmevent3 - mhpmevent31) - where scountovf bit X corresponds to mhpmeventX.
 
-  This register enables supervisor-level overflow interrupt handler software to quickly and easily determine which counter(s) have overflowed
+  This register enables supervisor-level overflow interrupt handler
+  software to quickly and easily determine which counter(s) have overflowed
   (without needing to make an execution environment call or series of calls ultimately up to M-mode).
 
-  Read access to bit X is subject to the same `mcounteren` (or `mcounteren` and `hcounteren`) CSRs that mediate access to the `hpmcounter` CSRs by S-mode (or VS-mode).
-  In M-mode, `scountovf` bit X is always readable. In S/HS-mode, `scountovf` bit X is readable when `mcounteren` bit X is set, and otherwise reads as zero.
-  Similarly, in VS-mode, `scountovf` bit X is readable when both `mcounteren` bit X and `hcounteren` bit X are set, and otherwise reads as zero.
+  Read access to bit X is subject to the same mcounteren (or mcounteren and hcounteren)
+  CSRs that mediate access to the hpmcounter CSRs by S-mode (or VS-mode).
+  In M-mode, scountovf bit X is always readable. In S/HS-mode, scountovf bit X is readable
+  when mcounteren bit X is set, and otherwise reads as zero. Similarly, in VS mode,
+  scountovf bit X is readable when mcounteren bit X and hcounteren bit X are both set, and otherwise reads as zero
 
 fields:
-  OF:
-    location_rv32: 31
-    location_rv64: 31
+  OF_shadow_bits:
+    location: 31
     type: RO
     description: |
-      Overflow status and interrupt disable bit that is set when the corresponding `hpmcounter` overflows.
+      Read-only shadow copies of the OF bits from mhpmevent3 to mhpmevent31.
     reset_value: UNDEFINED_LEGAL

From e639889c028913b4f357c10f42a5840373bec5ce Mon Sep 17 00:00:00 2001
From: syedowaisalishah <alishahowais@gmail.com>
Date: Fri, 18 Apr 2025 17:15:45 +0000
Subject: [PATCH 03/15] Add CSR YAML files for Sscofpmf: scountovf

---
 arch/csr/Sscofpmf/scountovf.yaml | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/arch/csr/Sscofpmf/scountovf.yaml b/arch/csr/Sscofpmf/scountovf.yaml
index 0af8d5461..05e9998a4 100644
--- a/arch/csr/Sscofpmf/scountovf.yaml
+++ b/arch/csr/Sscofpmf/scountovf.yaml
@@ -2,13 +2,13 @@
 $schema: csr_schema.json#
 kind: csr
 name: scountovf
-long_name: Supervisor Count Overflow (scountovf) Register
-address: 0x700
+long_name: Supervisor Count Overflow
+address: 0xDA0
 priv_mode: S
 length: 32
 definedBy: Sscofpmf
 description: |
-  This extension adds the scountovf CSR, a 32-bit read-only
+  A 32-bit read-only
   register that contains shadow copies of the OF bits in the 29 mhpmevent CSRs
   (mhpmevent3 - mhpmevent31) - where scountovf bit X corresponds to mhpmeventX.
 
@@ -24,8 +24,9 @@ description: |
 
 fields:
   OF_shadow_bits:
-    location: 31
+    location: 31-3
     type: RO
     description: |
       Read-only shadow copies of the OF bits from mhpmevent3 to mhpmevent31.
     reset_value: UNDEFINED_LEGAL
+sw_read(): |

From 3575bd5b68c99beab7969b5a06ea296483df9e5f Mon Sep 17 00:00:00 2001
From: syedowaisalishah <alishahowais@gmail.com>
Date: Sat, 26 Apr 2025 18:35:47 +0000
Subject: [PATCH 04/15] Add CSR YAML files for Sscofpmf: scountovf

---
 arch/csr/Sscofpmf/scountovf.yaml | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/arch/csr/Sscofpmf/scountovf.yaml b/arch/csr/Sscofpmf/scountovf.yaml
index 05e9998a4..a7e32a369 100644
--- a/arch/csr/Sscofpmf/scountovf.yaml
+++ b/arch/csr/Sscofpmf/scountovf.yaml
@@ -9,24 +9,24 @@ length: 32
 definedBy: Sscofpmf
 description: |
   A 32-bit read-only
-  register that contains shadow copies of the OF bits in the 29 mhpmevent CSRs
-  (mhpmevent3 - mhpmevent31) - where scountovf bit X corresponds to mhpmeventX.
+  register that contains shadow copies of the OF bits in the 29 `mhpmevent` CSRs
+  (`mhpmevent3` - `mhpmevent31`) — where `scountovf` bit X corresponds to `mhpmeventX`.
 
   This register enables supervisor-level overflow interrupt handler
   software to quickly and easily determine which counter(s) have overflowed
   (without needing to make an execution environment call or series of calls ultimately up to M-mode).
 
-  Read access to bit X is subject to the same mcounteren (or mcounteren and hcounteren)
-  CSRs that mediate access to the hpmcounter CSRs by S-mode (or VS-mode).
-  In M-mode, scountovf bit X is always readable. In S/HS-mode, scountovf bit X is readable
-  when mcounteren bit X is set, and otherwise reads as zero. Similarly, in VS mode,
-  scountovf bit X is readable when mcounteren bit X and hcounteren bit X are both set, and otherwise reads as zero
+  Read access to bit X is subject to the same `mcounteren` (or `mcounteren` and `hcounteren`)
+  CSRs that mediate access to the `hpmcounter` CSRs by S-mode (or VS-mode).
+  In M-mode, `scountovf` bit X is always readable. In S/HS-mode, `scountovf` bit X is readable
+  when `mcounteren` bit X is set, and otherwise reads as zero. Similarly, in VS mode,
+  `scountovf` bit X is readable when `mcounteren` bit X and `hcounteren` bit X are both set, and otherwise reads as zero.
 
 fields:
   OF_shadow_bits:
     location: 31-3
     type: RO
     description: |
-      Read-only shadow copies of the OF bits from mhpmevent3 to mhpmevent31.
+      Read-only shadow copies of the OF bits from `mhpmevent3` to `mhpmevent31`.
     reset_value: UNDEFINED_LEGAL
 sw_read(): |

From dea3248bb194ba8d6d815017e8077535f92af6a0 Mon Sep 17 00:00:00 2001
From: syedowaisalishah <alishahowais@gmail.com>
Date: Sat, 26 Apr 2025 19:37:12 +0000
Subject: [PATCH 05/15] Add CSR YAML files for Sscofpmf: scountovf

---
 arch/csr/Sscofpmf/scountovf.yaml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/csr/Sscofpmf/scountovf.yaml b/arch/csr/Sscofpmf/scountovf.yaml
index a7e32a369..1c9fc888d 100644
--- a/arch/csr/Sscofpmf/scountovf.yaml
+++ b/arch/csr/Sscofpmf/scountovf.yaml
@@ -14,7 +14,7 @@ description: |
 
   This register enables supervisor-level overflow interrupt handler
   software to quickly and easily determine which counter(s) have overflowed
-  (without needing to make an execution environment call or series of calls ultimately up to M-mode).
+  (without needing to make an execution environment call or series of calls ultimately up to M-mode)
 
   Read access to bit X is subject to the same `mcounteren` (or `mcounteren` and `hcounteren`)
   CSRs that mediate access to the `hpmcounter` CSRs by S-mode (or VS-mode).

From 2a3b7bad31b039f425a0efb085dee9c0430c8229 Mon Sep 17 00:00:00 2001
From: syedowaisalishah <alishahowais@gmail.com>
Date: Thu, 1 May 2025 17:46:00 +0000
Subject: [PATCH 06/15] docs(sscofpmf): add CSR YAML and layout files for
 scountovf

---
 arch/csr/Sscofpmf/scountovf.layout |  31 ++++
 arch/csr/Sscofpmf/scountovf.yaml   | 245 ++++++++++++++++++++++++++++-
 2 files changed, 272 insertions(+), 4 deletions(-)
 create mode 100644 arch/csr/Sscofpmf/scountovf.layout

diff --git a/arch/csr/Sscofpmf/scountovf.layout b/arch/csr/Sscofpmf/scountovf.layout
new file mode 100644
index 000000000..4dea9faea
--- /dev/null
+++ b/arch/csr/Sscofpmf/scountovf.layout
@@ -0,0 +1,31 @@
+# scountovf.layout
+# Layout for scountovf CSR: each bit X reflects mhpmeventX.OF (for X = 3..31)
+bits[3]  = mhpmevent3.OF
+bits[4]  = mhpmevent4.OF
+bits[5]  = mhpmevent5.OF
+bits[6]  = mhpmevent6.OF
+bits[7]  = mhpmevent7.OF
+bits[8]  = mhpmevent8.OF
+bits[9]  = mhpmevent9.OF
+bits[10] = mhpmevent10.OF
+bits[11] = mhpmevent11.OF
+bits[12] = mhpmevent12.OF
+bits[13] = mhpmevent13.OF
+bits[14] = mhpmevent14.OF
+bits[15] = mhpmevent15.OF
+bits[16] = mhpmevent16.OF
+bits[17] = mhpmevent17.OF
+bits[18] = mhpmevent18.OF
+bits[19] = mhpmevent19.OF
+bits[20] = mhpmevent20.OF
+bits[21] = mhpmevent21.OF
+bits[22] = mhpmevent22.OF
+bits[23] = mhpmevent23.OF
+bits[24] = mhpmevent24.OF
+bits[25] = mhpmevent25.OF
+bits[26] = mhpmevent26.OF
+bits[27] = mhpmevent27.OF
+bits[28] = mhpmevent28.OF
+bits[29] = mhpmevent29.OF
+bits[30] = mhpmevent30.OF
+bits[31] = mhpmevent31.OF
diff --git a/arch/csr/Sscofpmf/scountovf.yaml b/arch/csr/Sscofpmf/scountovf.yaml
index 1c9fc888d..6c6960d21 100644
--- a/arch/csr/Sscofpmf/scountovf.yaml
+++ b/arch/csr/Sscofpmf/scountovf.yaml
@@ -23,10 +23,247 @@ description: |
   `scountovf` bit X is readable when `mcounteren` bit X and `hcounteren` bit X are both set, and otherwise reads as zero.
 
 fields:
-  OF_shadow_bits:
-    location: 31-3
+  OF3:
+    alias: mhpmevent3.OF
+    location: 3
     type: RO
-    description: |
-      Read-only shadow copies of the OF bits from `mhpmevent3` to `mhpmevent31`.
+    description: Shadow copy of mhpmevent3 overflow (OF) bit.
+    reset_value: UNDEFINED_LEGAL
+
+  OF4:
+    alias: mhpmevent4.OF
+    location: 4
+    type: RO
+    description: Shadow copy of mhpmevent4 overflow (OF) bit.
+    reset_value: UNDEFINED_LEGAL
+
+  OF5:
+    alias: mhpmevent5.OF
+    location: 5
+    type: RO
+    description: Shadow copy of mhpmevent5 overflow (OF) bit.
+    reset_value: UNDEFINED_LEGAL
+
+  OF6:
+    alias: mhpmevent6.OF
+    location: 6
+    type: RO
+    description: Shadow copy of mhpmevent6 overflow (OF) bit.
+    reset_value: UNDEFINED_LEGAL
+
+  OF7:
+    alias: mhpmevent7.OF
+    location: 7
+    type: RO
+    description: Shadow copy of mhpmevent7 overflow (OF) bit.
+    reset_value: UNDEFINED_LEGAL
+
+  OF8:
+    alias: mhpmevent8.OF
+    location: 8
+    type: RO
+    description: Shadow copy of mhpmevent8 overflow (OF) bit.
+    reset_value: UNDEFINED_LEGAL
+
+  OF9:
+    alias: mhpmevent9.OF
+    location: 9
+    type: RO
+    description: Shadow copy of mhpmevent9 overflow (OF) bit.
+    reset_value: UNDEFINED_LEGAL
+
+  OF10:
+    alias: mhpmevent10.OF
+    location: 10
+    type: RO
+    description: Shadow copy of mhpmevent10 overflow (OF) bit.
+    reset_value: UNDEFINED_LEGAL
+
+  OF11:
+    alias: mhpmevent11.OF
+    location: 11
+    type: RO
+    description: Shadow copy of mhpmevent11 overflow (OF) bit.
+    reset_value: UNDEFINED_LEGAL
+
+  OF12:
+    alias: mhpmevent12.OF
+    location: 12
+    type: RO
+    description: Shadow copy of mhpmevent12 overflow (OF) bit.
+    reset_value: UNDEFINED_LEGAL
+
+  OF13:
+    alias: mhpmevent13.OF
+    location: 13
+    type: RO
+    description: Shadow copy of mhpmevent13 overflow (OF) bit.
+    reset_value: UNDEFINED_LEGAL
+
+  OF14:
+    alias: mhpmevent14.OF
+    location: 14
+    type: RO
+    description: Shadow copy of mhpmevent14 overflow (OF) bit.
+    reset_value: UNDEFINED_LEGAL
+
+  OF15:
+    alias: mhpmevent15.OF
+    location: 15
+    type: RO
+    description: Shadow copy of mhpmevent15 overflow (OF) bit.
+    reset_value: UNDEFINED_LEGAL
+
+  OF16:
+    alias: mhpmevent16.OF
+    location: 16
+    type: RO
+    description: Shadow copy of mhpmevent16 overflow (OF) bit.
+    reset_value: UNDEFINED_LEGAL
+
+  OF17:
+    alias: mhpmevent17.OF
+    location: 17
+    type: RO
+    description: Shadow copy of mhpmevent17 overflow (OF) bit.
+    reset_value: UNDEFINED_LEGAL
+
+  OF18:
+    alias: mhpmevent18.OF
+    location: 18
+    type: RO
+    description: Shadow copy of mhpmevent18 overflow (OF) bit.
+    reset_value: UNDEFINED_LEGAL
+
+  OF19:
+    alias: mhpmevent19.OF
+    location: 19
+    type: RO
+    description: Shadow copy of mhpmevent19 overflow (OF) bit.
+    reset_value: UNDEFINED_LEGAL
+
+  OF20:
+    alias: mhpmevent20.OF
+    location: 20
+    type: RO
+    description: Shadow copy of mhpmevent20 overflow (OF) bit.
+    reset_value: UNDEFINED_LEGAL
+
+  OF21:
+    alias: mhpmevent21.OF
+    location: 21
+    type: RO
+    description: Shadow copy of mhpmevent21 overflow (OF) bit.
+    reset_value: UNDEFINED_LEGAL
+
+  OF22:
+    alias: mhpmevent22.OF
+    location: 22
+    type: RO
+    description: Shadow copy of mhpmevent22 overflow (OF) bit.
+    reset_value: UNDEFINED_LEGAL
+
+  OF23:
+    alias: mhpmevent23.OF
+    location: 23
+    type: RO
+    description: Shadow copy of mhpmevent23 overflow (OF) bit.
+    reset_value: UNDEFINED_LEGAL
+
+  OF24:
+    alias: mhpmevent24.OF
+    location: 24
+    type: RO
+    description: Shadow copy of mhpmevent24 overflow (OF) bit.
+    reset_value: UNDEFINED_LEGAL
+
+  OF25:
+    alias: mhpmevent25.OF
+    location: 25
+    type: RO
+    description: Shadow copy of mhpmevent25 overflow (OF) bit.
+    reset_value: UNDEFINED_LEGAL
+
+  OF26:
+    alias: mhpmevent26.OF
+    location: 26
+    type: RO
+    description: Shadow copy of mhpmevent26 overflow (OF) bit.
+    reset_value: UNDEFINED_LEGAL
+
+  OF27:
+    alias: mhpmevent27.OF
+    location: 27
+    type: RO
+    description: Shadow copy of mhpmevent27 overflow (OF) bit.
+    reset_value: UNDEFINED_LEGAL
+
+  OF28:
+    alias: mhpmevent28.OF
+    location: 28
+    type: RO
+    description: Shadow copy of mhpmevent28 overflow (OF) bit.
+    reset_value: UNDEFINED_LEGAL
+
+  OF29:
+    alias: mhpmevent29.OF
+    location: 29
+    type: RO
+    description: Shadow copy of mhpmevent29 overflow (OF) bit.
+    reset_value: UNDEFINED_LEGAL
+
+  OF30:
+    alias: mhpmevent30.OF
+    location: 30
+    type: RO
+    description: Shadow copy of mhpmevent30 overflow (OF) bit.
+    reset_value: UNDEFINED_LEGAL
+
+  OF31:
+    alias: mhpmevent31.OF
+    location: 31
+    type: RO
+    description: Shadow copy of mhpmevent31 overflow (OF) bit.
     reset_value: UNDEFINED_LEGAL
 sw_read(): |
+  Bits<32> mask;
+  if (mode() == PrivilegeMode::VS) {
+    # in VS-mode, scountovf.OFX access is determined by mcounteren/hcounteren
+    mask = $bits(CSR[mcounteren]) & $bits(CSR[hcounteren]);
+  } else {
+    # in M-mode and S-mode, scountovf.OFX access is determined by mcounteren/scounteren
+    mask = $bits(CSR[mcounteren]) & $bits(CSR[scounteren]);
+  }
+
+  Bits<32> value =
+    (CSR[mhpmevent3].OF << 3) |
+    (CSR[mhpmevent4].OF << 4) |
+    (CSR[mhpmevent5].OF << 5) |
+    (CSR[mhpmevent6].OF << 6) |
+    (CSR[mhpmevent7].OF << 7) |
+    (CSR[mhpmevent8].OF << 8) |
+    (CSR[mhpmevent9].OF << 9) |
+    (CSR[mhpmevent10].OF << 10) |
+    (CSR[mhpmevent11].OF << 11) |
+    (CSR[mhpmevent12].OF << 12) |
+    (CSR[mhpmevent13].OF << 13) |
+    (CSR[mhpmevent14].OF << 14) |
+    (CSR[mhpmevent15].OF << 15) |
+    (CSR[mhpmevent16].OF << 16) |
+    (CSR[mhpmevent17].OF << 17) |
+    (CSR[mhpmevent18].OF << 18) |
+    (CSR[mhpmevent19].OF << 19) |
+    (CSR[mhpmevent20].OF << 20) |
+    (CSR[mhpmevent21].OF << 21) |
+    (CSR[mhpmevent22].OF << 22) |
+    (CSR[mhpmevent23].OF << 23) |
+    (CSR[mhpmevent24].OF << 24) |
+    (CSR[mhpmevent25].OF << 25) |
+    (CSR[mhpmevent26].OF << 26) |
+    (CSR[mhpmevent27].OF << 27) |
+    (CSR[mhpmevent28].OF << 28) |
+    (CSR[mhpmevent29].OF << 29) |
+    (CSR[mhpmevent30].OF << 30) |
+    (CSR[mhpmevent31].OF << 31);
+
+  return value & mask;

From 12e83ba46c4dd26771d6fc2bc845818941b6cd4d Mon Sep 17 00:00:00 2001
From: syedowaisalishah <alishahowais@gmail.com>
Date: Sat, 3 May 2025 14:58:15 +0000
Subject: [PATCH 07/15] docs(sscofpmf): add CSR YAML and layout files for
 scountovf

---
 arch/csr/Sscofpmf/scountovf.layout | 115 +++++---
 arch/csr/Sscofpmf/scountovf.yaml   | 408 +++++++++++++++++++++--------
 2 files changed, 377 insertions(+), 146 deletions(-)

diff --git a/arch/csr/Sscofpmf/scountovf.layout b/arch/csr/Sscofpmf/scountovf.layout
index 4dea9faea..66f154685 100644
--- a/arch/csr/Sscofpmf/scountovf.layout
+++ b/arch/csr/Sscofpmf/scountovf.layout
@@ -1,31 +1,84 @@
-# scountovf.layout
-# Layout for scountovf CSR: each bit X reflects mhpmeventX.OF (for X = 3..31)
-bits[3]  = mhpmevent3.OF
-bits[4]  = mhpmevent4.OF
-bits[5]  = mhpmevent5.OF
-bits[6]  = mhpmevent6.OF
-bits[7]  = mhpmevent7.OF
-bits[8]  = mhpmevent8.OF
-bits[9]  = mhpmevent9.OF
-bits[10] = mhpmevent10.OF
-bits[11] = mhpmevent11.OF
-bits[12] = mhpmevent12.OF
-bits[13] = mhpmevent13.OF
-bits[14] = mhpmevent14.OF
-bits[15] = mhpmevent15.OF
-bits[16] = mhpmevent16.OF
-bits[17] = mhpmevent17.OF
-bits[18] = mhpmevent18.OF
-bits[19] = mhpmevent19.OF
-bits[20] = mhpmevent20.OF
-bits[21] = mhpmevent21.OF
-bits[22] = mhpmevent22.OF
-bits[23] = mhpmevent23.OF
-bits[24] = mhpmevent24.OF
-bits[25] = mhpmevent25.OF
-bits[26] = mhpmevent26.OF
-bits[27] = mhpmevent27.OF
-bits[28] = mhpmevent28.OF
-bits[29] = mhpmevent29.OF
-bits[30] = mhpmevent30.OF
-bits[31] = mhpmevent31.OF
+# yaml-language-server: $schema=../../../schemas/csr_schema.json
+
+$schema: csr_schema.json#
+kind: csr
+name: scountovf
+long_name: Supervisor Count Overflow
+address: 0xDA0
+priv_mode: S
+length: 32
+definedBy: Sscofpmf
+description: |
+  A 32-bit read-only
+  register that contains shadow copies of the OF bits in the 29 `mhpmevent` CSRs
+  (`mhpmevent3` - `mhpmevent31`) — where `scountovf` bit X corresponds to `mhpmeventX`.
+
+  This register enables supervisor-level overflow interrupt handler
+  software to quickly and easily determine which counter(s) have overflowed
+  (without needing to make an execution environment call or series of calls ultimately up to M-mode)
+
+  Read access to bit X is subject to the same `mcounteren` (or `mcounteren` and `hcounteren`)
+  CSRs that mediate access to the `hpmcounter` CSRs by S-mode (or VS-mode).
+  In M-mode, `scountovf` bit X is always readable. In S/HS-mode, `scountovf` bit X is readable
+  when `mcounteren` bit X is set, and otherwise reads as zero. Similarly, in VS mode,
+  `scountovf` bit X is readable when `mcounteren` bit X and `hcounteren` bit X are both set, and otherwise reads as zero.
+
+fields:
+  <%- (3..31).each do |of_num| -%>
+    OF<%= of_num %>:
+      alias: mhpmevent<%= of_num %>.OF
+      location: <%= of_num %>
+      description: |
+        [when="mhpmevent<%= of_num %>.EN == true"]
+        Shadow copy of mhpmevent<%= of_num %> overflow (OF) bit.
+
+        [when="mhpmevent<%= of_num %>.EN == false"]
+        This field is read-only zero because the event is not enabled.
+      type(): |
+        return mhpmevent<%= of_num %>.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      reset_value(): |
+        return mhpmevent<%= of_num %>.EN ? UNDEFINED_LEGAL : 0;
+  <%- end -%>
+
+sw_read(): |
+  Bits<32> mask;
+  if (mode() == PrivilegeMode::VS) {
+    # in VS-mode, scountovf.OFX access is determined by mcounteren/hcounteren
+    mask = $bits(CSR[mcounteren]) & $bits(CSR[hcounteren]);
+  } else {
+    # in M-mode and S-mode, scountovf.OFX access is determined by mcounteren/scounteren
+    mask = $bits(CSR[mcounteren]) & $bits(CSR[scounteren]);
+  }
+
+  Bits<32> value =
+    (CSR[mhpmevent3].OF << 3) |
+    (CSR[mhpmevent4].OF << 4) |
+    (CSR[mhpmevent5].OF << 5) |
+    (CSR[mhpmevent6].OF << 6) |
+    (CSR[mhpmevent7].OF << 7) |
+    (CSR[mhpmevent8].OF << 8) |
+    (CSR[mhpmevent9].OF << 9) |
+    (CSR[mhpmevent10].OF << 10) |
+    (CSR[mhpmevent11].OF << 11) |
+    (CSR[mhpmevent12].OF << 12) |
+    (CSR[mhpmevent13].OF << 13) |
+    (CSR[mhpmevent14].OF << 14) |
+    (CSR[mhpmevent15].OF << 15) |
+    (CSR[mhpmevent16].OF << 16) |
+    (CSR[mhpmevent17].OF << 17) |
+    (CSR[mhpmevent18].OF << 18) |
+    (CSR[mhpmevent19].OF << 19) |
+    (CSR[mhpmevent20].OF << 20) |
+    (CSR[mhpmevent21].OF << 21) |
+    (CSR[mhpmevent22].OF << 22) |
+    (CSR[mhpmevent23].OF << 23) |
+    (CSR[mhpmevent24].OF << 24) |
+    (CSR[mhpmevent25].OF << 25) |
+    (CSR[mhpmevent26].OF << 26) |
+    (CSR[mhpmevent27].OF << 27) |
+    (CSR[mhpmevent28].OF << 28) |
+    (CSR[mhpmevent29].OF << 29) |
+    (CSR[mhpmevent30].OF << 30) |
+    (CSR[mhpmevent31].OF << 31);
+
+  return value & mask;
diff --git a/arch/csr/Sscofpmf/scountovf.yaml b/arch/csr/Sscofpmf/scountovf.yaml
index 6c6960d21..eeef9be63 100644
--- a/arch/csr/Sscofpmf/scountovf.yaml
+++ b/arch/csr/Sscofpmf/scountovf.yaml
@@ -1,4 +1,6 @@
 # yaml-language-server: $schema=../../../schemas/csr_schema.json
+
+# WARNING: This file is auto-generated from arch/csr/Sscofpmf/scountovf.layout
 $schema: csr_schema.json#
 kind: csr
 name: scountovf
@@ -26,205 +28,381 @@ fields:
   OF3:
     alias: mhpmevent3.OF
     location: 3
-    type: RO
-    description: Shadow copy of mhpmevent3 overflow (OF) bit.
-    reset_value: UNDEFINED_LEGAL
-
+    description: |
+      [when="mhpmevent3.EN == true"]
+      Shadow copy of mhpmevent3 overflow (OF) bit.
+
+      [when="mhpmevent3.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent3.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent3.EN ? UNDEFINED_LEGAL : 0;
   OF4:
     alias: mhpmevent4.OF
     location: 4
-    type: RO
-    description: Shadow copy of mhpmevent4 overflow (OF) bit.
-    reset_value: UNDEFINED_LEGAL
-
+    description: |
+      [when="mhpmevent4.EN == true"]
+      Shadow copy of mhpmevent4 overflow (OF) bit.
+
+      [when="mhpmevent4.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent4.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent4.EN ? UNDEFINED_LEGAL : 0;
   OF5:
     alias: mhpmevent5.OF
     location: 5
-    type: RO
-    description: Shadow copy of mhpmevent5 overflow (OF) bit.
-    reset_value: UNDEFINED_LEGAL
-
+    description: |
+      [when="mhpmevent5.EN == true"]
+      Shadow copy of mhpmevent5 overflow (OF) bit.
+
+      [when="mhpmevent5.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent5.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent5.EN ? UNDEFINED_LEGAL : 0;
   OF6:
     alias: mhpmevent6.OF
     location: 6
-    type: RO
-    description: Shadow copy of mhpmevent6 overflow (OF) bit.
-    reset_value: UNDEFINED_LEGAL
-
+    description: |
+      [when="mhpmevent6.EN == true"]
+      Shadow copy of mhpmevent6 overflow (OF) bit.
+
+      [when="mhpmevent6.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent6.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent6.EN ? UNDEFINED_LEGAL : 0;
   OF7:
     alias: mhpmevent7.OF
     location: 7
-    type: RO
-    description: Shadow copy of mhpmevent7 overflow (OF) bit.
-    reset_value: UNDEFINED_LEGAL
-
+    description: |
+      [when="mhpmevent7.EN == true"]
+      Shadow copy of mhpmevent7 overflow (OF) bit.
+
+      [when="mhpmevent7.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent7.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent7.EN ? UNDEFINED_LEGAL : 0;
   OF8:
     alias: mhpmevent8.OF
     location: 8
-    type: RO
-    description: Shadow copy of mhpmevent8 overflow (OF) bit.
-    reset_value: UNDEFINED_LEGAL
-
+    description: |
+      [when="mhpmevent8.EN == true"]
+      Shadow copy of mhpmevent8 overflow (OF) bit.
+
+      [when="mhpmevent8.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent8.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent8.EN ? UNDEFINED_LEGAL : 0;
   OF9:
     alias: mhpmevent9.OF
     location: 9
-    type: RO
-    description: Shadow copy of mhpmevent9 overflow (OF) bit.
-    reset_value: UNDEFINED_LEGAL
-
+    description: |
+      [when="mhpmevent9.EN == true"]
+      Shadow copy of mhpmevent9 overflow (OF) bit.
+
+      [when="mhpmevent9.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent9.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent9.EN ? UNDEFINED_LEGAL : 0;
   OF10:
     alias: mhpmevent10.OF
     location: 10
-    type: RO
-    description: Shadow copy of mhpmevent10 overflow (OF) bit.
-    reset_value: UNDEFINED_LEGAL
-
+    description: |
+      [when="mhpmevent10.EN == true"]
+      Shadow copy of mhpmevent10 overflow (OF) bit.
+
+      [when="mhpmevent10.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent10.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent10.EN ? UNDEFINED_LEGAL : 0;
   OF11:
     alias: mhpmevent11.OF
     location: 11
-    type: RO
-    description: Shadow copy of mhpmevent11 overflow (OF) bit.
-    reset_value: UNDEFINED_LEGAL
-
+    description: |
+      [when="mhpmevent11.EN == true"]
+      Shadow copy of mhpmevent11 overflow (OF) bit.
+
+      [when="mhpmevent11.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent11.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent11.EN ? UNDEFINED_LEGAL : 0;
   OF12:
     alias: mhpmevent12.OF
     location: 12
-    type: RO
-    description: Shadow copy of mhpmevent12 overflow (OF) bit.
-    reset_value: UNDEFINED_LEGAL
-
+    description: |
+      [when="mhpmevent12.EN == true"]
+      Shadow copy of mhpmevent12 overflow (OF) bit.
+
+      [when="mhpmevent12.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent12.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent12.EN ? UNDEFINED_LEGAL : 0;
   OF13:
     alias: mhpmevent13.OF
     location: 13
-    type: RO
-    description: Shadow copy of mhpmevent13 overflow (OF) bit.
-    reset_value: UNDEFINED_LEGAL
-
+    description: |
+      [when="mhpmevent13.EN == true"]
+      Shadow copy of mhpmevent13 overflow (OF) bit.
+
+      [when="mhpmevent13.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent13.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent13.EN ? UNDEFINED_LEGAL : 0;
   OF14:
     alias: mhpmevent14.OF
     location: 14
-    type: RO
-    description: Shadow copy of mhpmevent14 overflow (OF) bit.
-    reset_value: UNDEFINED_LEGAL
-
+    description: |
+      [when="mhpmevent14.EN == true"]
+      Shadow copy of mhpmevent14 overflow (OF) bit.
+
+      [when="mhpmevent14.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent14.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent14.EN ? UNDEFINED_LEGAL : 0;
   OF15:
     alias: mhpmevent15.OF
     location: 15
-    type: RO
-    description: Shadow copy of mhpmevent15 overflow (OF) bit.
-    reset_value: UNDEFINED_LEGAL
-
+    description: |
+      [when="mhpmevent15.EN == true"]
+      Shadow copy of mhpmevent15 overflow (OF) bit.
+
+      [when="mhpmevent15.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent15.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent15.EN ? UNDEFINED_LEGAL : 0;
   OF16:
     alias: mhpmevent16.OF
     location: 16
-    type: RO
-    description: Shadow copy of mhpmevent16 overflow (OF) bit.
-    reset_value: UNDEFINED_LEGAL
-
+    description: |
+      [when="mhpmevent16.EN == true"]
+      Shadow copy of mhpmevent16 overflow (OF) bit.
+
+      [when="mhpmevent16.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent16.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent16.EN ? UNDEFINED_LEGAL : 0;
   OF17:
     alias: mhpmevent17.OF
     location: 17
-    type: RO
-    description: Shadow copy of mhpmevent17 overflow (OF) bit.
-    reset_value: UNDEFINED_LEGAL
-
+    description: |
+      [when="mhpmevent17.EN == true"]
+      Shadow copy of mhpmevent17 overflow (OF) bit.
+
+      [when="mhpmevent17.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent17.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent17.EN ? UNDEFINED_LEGAL : 0;
   OF18:
     alias: mhpmevent18.OF
     location: 18
-    type: RO
-    description: Shadow copy of mhpmevent18 overflow (OF) bit.
-    reset_value: UNDEFINED_LEGAL
-
+    description: |
+      [when="mhpmevent18.EN == true"]
+      Shadow copy of mhpmevent18 overflow (OF) bit.
+
+      [when="mhpmevent18.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent18.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent18.EN ? UNDEFINED_LEGAL : 0;
   OF19:
     alias: mhpmevent19.OF
     location: 19
-    type: RO
-    description: Shadow copy of mhpmevent19 overflow (OF) bit.
-    reset_value: UNDEFINED_LEGAL
-
+    description: |
+      [when="mhpmevent19.EN == true"]
+      Shadow copy of mhpmevent19 overflow (OF) bit.
+
+      [when="mhpmevent19.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent19.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent19.EN ? UNDEFINED_LEGAL : 0;
   OF20:
     alias: mhpmevent20.OF
     location: 20
-    type: RO
-    description: Shadow copy of mhpmevent20 overflow (OF) bit.
-    reset_value: UNDEFINED_LEGAL
-
+    description: |
+      [when="mhpmevent20.EN == true"]
+      Shadow copy of mhpmevent20 overflow (OF) bit.
+
+      [when="mhpmevent20.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent20.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent20.EN ? UNDEFINED_LEGAL : 0;
   OF21:
     alias: mhpmevent21.OF
     location: 21
-    type: RO
-    description: Shadow copy of mhpmevent21 overflow (OF) bit.
-    reset_value: UNDEFINED_LEGAL
-
+    description: |
+      [when="mhpmevent21.EN == true"]
+      Shadow copy of mhpmevent21 overflow (OF) bit.
+
+      [when="mhpmevent21.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent21.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent21.EN ? UNDEFINED_LEGAL : 0;
   OF22:
     alias: mhpmevent22.OF
     location: 22
-    type: RO
-    description: Shadow copy of mhpmevent22 overflow (OF) bit.
-    reset_value: UNDEFINED_LEGAL
-
+    description: |
+      [when="mhpmevent22.EN == true"]
+      Shadow copy of mhpmevent22 overflow (OF) bit.
+
+      [when="mhpmevent22.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent22.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent22.EN ? UNDEFINED_LEGAL : 0;
   OF23:
     alias: mhpmevent23.OF
     location: 23
-    type: RO
-    description: Shadow copy of mhpmevent23 overflow (OF) bit.
-    reset_value: UNDEFINED_LEGAL
-
+    description: |
+      [when="mhpmevent23.EN == true"]
+      Shadow copy of mhpmevent23 overflow (OF) bit.
+
+      [when="mhpmevent23.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent23.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent23.EN ? UNDEFINED_LEGAL : 0;
   OF24:
     alias: mhpmevent24.OF
     location: 24
-    type: RO
-    description: Shadow copy of mhpmevent24 overflow (OF) bit.
-    reset_value: UNDEFINED_LEGAL
-
+    description: |
+      [when="mhpmevent24.EN == true"]
+      Shadow copy of mhpmevent24 overflow (OF) bit.
+
+      [when="mhpmevent24.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent24.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent24.EN ? UNDEFINED_LEGAL : 0;
   OF25:
     alias: mhpmevent25.OF
     location: 25
-    type: RO
-    description: Shadow copy of mhpmevent25 overflow (OF) bit.
-    reset_value: UNDEFINED_LEGAL
-
+    description: |
+      [when="mhpmevent25.EN == true"]
+      Shadow copy of mhpmevent25 overflow (OF) bit.
+
+      [when="mhpmevent25.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent25.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent25.EN ? UNDEFINED_LEGAL : 0;
   OF26:
     alias: mhpmevent26.OF
     location: 26
-    type: RO
-    description: Shadow copy of mhpmevent26 overflow (OF) bit.
-    reset_value: UNDEFINED_LEGAL
-
+    description: |
+      [when="mhpmevent26.EN == true"]
+      Shadow copy of mhpmevent26 overflow (OF) bit.
+
+      [when="mhpmevent26.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent26.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent26.EN ? UNDEFINED_LEGAL : 0;
   OF27:
     alias: mhpmevent27.OF
     location: 27
-    type: RO
-    description: Shadow copy of mhpmevent27 overflow (OF) bit.
-    reset_value: UNDEFINED_LEGAL
-
+    description: |
+      [when="mhpmevent27.EN == true"]
+      Shadow copy of mhpmevent27 overflow (OF) bit.
+
+      [when="mhpmevent27.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent27.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent27.EN ? UNDEFINED_LEGAL : 0;
   OF28:
     alias: mhpmevent28.OF
     location: 28
-    type: RO
-    description: Shadow copy of mhpmevent28 overflow (OF) bit.
-    reset_value: UNDEFINED_LEGAL
-
+    description: |
+      [when="mhpmevent28.EN == true"]
+      Shadow copy of mhpmevent28 overflow (OF) bit.
+
+      [when="mhpmevent28.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent28.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent28.EN ? UNDEFINED_LEGAL : 0;
   OF29:
     alias: mhpmevent29.OF
     location: 29
-    type: RO
-    description: Shadow copy of mhpmevent29 overflow (OF) bit.
-    reset_value: UNDEFINED_LEGAL
-
+    description: |
+      [when="mhpmevent29.EN == true"]
+      Shadow copy of mhpmevent29 overflow (OF) bit.
+
+      [when="mhpmevent29.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent29.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent29.EN ? UNDEFINED_LEGAL : 0;
   OF30:
     alias: mhpmevent30.OF
     location: 30
-    type: RO
-    description: Shadow copy of mhpmevent30 overflow (OF) bit.
-    reset_value: UNDEFINED_LEGAL
-
+    description: |
+      [when="mhpmevent30.EN == true"]
+      Shadow copy of mhpmevent30 overflow (OF) bit.
+
+      [when="mhpmevent30.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent30.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent30.EN ? UNDEFINED_LEGAL : 0;
   OF31:
     alias: mhpmevent31.OF
     location: 31
-    type: RO
-    description: Shadow copy of mhpmevent31 overflow (OF) bit.
-    reset_value: UNDEFINED_LEGAL
+    description: |
+      [when="mhpmevent31.EN == true"]
+      Shadow copy of mhpmevent31 overflow (OF) bit.
+
+      [when="mhpmevent31.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent31.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent31.EN ? UNDEFINED_LEGAL : 0;
+
 sw_read(): |
   Bits<32> mask;
   if (mode() == PrivilegeMode::VS) {

From 233356542937c87af3616d342db883176128492c Mon Sep 17 00:00:00 2001
From: syedowaisalishah <alishahowais@gmail.com>
Date: Sat, 3 May 2025 15:07:10 +0000
Subject: [PATCH 08/15] chore(rake): add task to generate scountovf.yaml from
 layout

---
 Rakefile | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/Rakefile b/Rakefile
index 7d27e9ca8..e2d1a9b54 100755
--- a/Rakefile
+++ b/Rakefile
@@ -388,6 +388,15 @@ file "#{$root}/arch/csr/S/scounteren.yaml" => [
   File.write(t.name, insert_warning(erb.result(binding), t.prerequisites.first))
 end
 
+file "#{$root}/arch/csr/Sscofpmf/scountovf.yaml" => [
+  "#{$root}/arch/csr/Sscofpmf/scountovf.layout",
+  __FILE__
+] do |t|
+  erb = ERB.new(File.read($root / "arch/csr/Sscofpmf/scountovf.layout"), trim_mode: "-")
+  erb.filename = "#{$root}/arch/csr/Sscofpmf/scountovf.layout"
+  File.write(t.name, insert_warning(erb.result(binding), t.prerequisites.first))
+end
+
 file "#{$root}/arch/csr/H/hcounteren.yaml" => [
   "#{$root}/arch/csr/H/hcounteren.layout",
   __FILE__
@@ -421,6 +430,7 @@ namespace :gen do
 
     Rake::Task["#{$root}/arch/csr/I/mcounteren.yaml"].invoke
     Rake::Task["#{$root}/arch/csr/S/scounteren.yaml"].invoke
+    Rake::Task["#{$root}/arch/csr/Sscofpmf/scountovf.yaml"].invoke
     Rake::Task["#{$root}/arch/csr/H/hcounteren.yaml"].invoke
     Rake::Task["#{$root}/arch/csr/Zicntr/mcountinhibit.yaml"].invoke
 

From 906868be1d2e871286c7f71b7a9ad71b3ae38a32 Mon Sep 17 00:00:00 2001
From: syedowaisalishah <alishahowais@gmail.com>
Date: Sat, 3 May 2025 16:57:10 +0000
Subject: [PATCH 09/15] docs(sscofpmf): add CSR layout file for scountovf

---
 arch/csr/Sscofpmf/scountovf.layout |  31 +-
 arch/csr/Sscofpmf/scountovf.yaml   | 447 -----------------------------
 2 files changed, 3 insertions(+), 475 deletions(-)
 delete mode 100644 arch/csr/Sscofpmf/scountovf.yaml

diff --git a/arch/csr/Sscofpmf/scountovf.layout b/arch/csr/Sscofpmf/scountovf.layout
index 66f154685..4dde07c05 100644
--- a/arch/csr/Sscofpmf/scountovf.layout
+++ b/arch/csr/Sscofpmf/scountovf.layout
@@ -51,34 +51,9 @@ sw_read(): |
   }
 
   Bits<32> value =
-    (CSR[mhpmevent3].OF << 3) |
-    (CSR[mhpmevent4].OF << 4) |
-    (CSR[mhpmevent5].OF << 5) |
-    (CSR[mhpmevent6].OF << 6) |
-    (CSR[mhpmevent7].OF << 7) |
-    (CSR[mhpmevent8].OF << 8) |
-    (CSR[mhpmevent9].OF << 9) |
-    (CSR[mhpmevent10].OF << 10) |
-    (CSR[mhpmevent11].OF << 11) |
-    (CSR[mhpmevent12].OF << 12) |
-    (CSR[mhpmevent13].OF << 13) |
-    (CSR[mhpmevent14].OF << 14) |
-    (CSR[mhpmevent15].OF << 15) |
-    (CSR[mhpmevent16].OF << 16) |
-    (CSR[mhpmevent17].OF << 17) |
-    (CSR[mhpmevent18].OF << 18) |
-    (CSR[mhpmevent19].OF << 19) |
-    (CSR[mhpmevent20].OF << 20) |
-    (CSR[mhpmevent21].OF << 21) |
-    (CSR[mhpmevent22].OF << 22) |
-    (CSR[mhpmevent23].OF << 23) |
-    (CSR[mhpmevent24].OF << 24) |
-    (CSR[mhpmevent25].OF << 25) |
-    (CSR[mhpmevent26].OF << 26) |
-    (CSR[mhpmevent27].OF << 27) |
-    (CSR[mhpmevent28].OF << 28) |
-    (CSR[mhpmevent29].OF << 29) |
-    (CSR[mhpmevent30].OF << 30) |
+  <%- (3..30).each do |num| -%>
+    (CSR[mhpmevent<%= num %>].OF << <%= num %>) |
+  <%- end -%>
     (CSR[mhpmevent31].OF << 31);
 
   return value & mask;
diff --git a/arch/csr/Sscofpmf/scountovf.yaml b/arch/csr/Sscofpmf/scountovf.yaml
deleted file mode 100644
index eeef9be63..000000000
--- a/arch/csr/Sscofpmf/scountovf.yaml
+++ /dev/null
@@ -1,447 +0,0 @@
-# yaml-language-server: $schema=../../../schemas/csr_schema.json
-
-# WARNING: This file is auto-generated from arch/csr/Sscofpmf/scountovf.layout
-$schema: csr_schema.json#
-kind: csr
-name: scountovf
-long_name: Supervisor Count Overflow
-address: 0xDA0
-priv_mode: S
-length: 32
-definedBy: Sscofpmf
-description: |
-  A 32-bit read-only
-  register that contains shadow copies of the OF bits in the 29 `mhpmevent` CSRs
-  (`mhpmevent3` - `mhpmevent31`) — where `scountovf` bit X corresponds to `mhpmeventX`.
-
-  This register enables supervisor-level overflow interrupt handler
-  software to quickly and easily determine which counter(s) have overflowed
-  (without needing to make an execution environment call or series of calls ultimately up to M-mode)
-
-  Read access to bit X is subject to the same `mcounteren` (or `mcounteren` and `hcounteren`)
-  CSRs that mediate access to the `hpmcounter` CSRs by S-mode (or VS-mode).
-  In M-mode, `scountovf` bit X is always readable. In S/HS-mode, `scountovf` bit X is readable
-  when `mcounteren` bit X is set, and otherwise reads as zero. Similarly, in VS mode,
-  `scountovf` bit X is readable when `mcounteren` bit X and `hcounteren` bit X are both set, and otherwise reads as zero.
-
-fields:
-  OF3:
-    alias: mhpmevent3.OF
-    location: 3
-    description: |
-      [when="mhpmevent3.EN == true"]
-      Shadow copy of mhpmevent3 overflow (OF) bit.
-
-      [when="mhpmevent3.EN == false"]
-      This field is read-only zero because the event is not enabled.
-    type(): |
-      return mhpmevent3.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
-    reset_value(): |
-      return mhpmevent3.EN ? UNDEFINED_LEGAL : 0;
-  OF4:
-    alias: mhpmevent4.OF
-    location: 4
-    description: |
-      [when="mhpmevent4.EN == true"]
-      Shadow copy of mhpmevent4 overflow (OF) bit.
-
-      [when="mhpmevent4.EN == false"]
-      This field is read-only zero because the event is not enabled.
-    type(): |
-      return mhpmevent4.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
-    reset_value(): |
-      return mhpmevent4.EN ? UNDEFINED_LEGAL : 0;
-  OF5:
-    alias: mhpmevent5.OF
-    location: 5
-    description: |
-      [when="mhpmevent5.EN == true"]
-      Shadow copy of mhpmevent5 overflow (OF) bit.
-
-      [when="mhpmevent5.EN == false"]
-      This field is read-only zero because the event is not enabled.
-    type(): |
-      return mhpmevent5.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
-    reset_value(): |
-      return mhpmevent5.EN ? UNDEFINED_LEGAL : 0;
-  OF6:
-    alias: mhpmevent6.OF
-    location: 6
-    description: |
-      [when="mhpmevent6.EN == true"]
-      Shadow copy of mhpmevent6 overflow (OF) bit.
-
-      [when="mhpmevent6.EN == false"]
-      This field is read-only zero because the event is not enabled.
-    type(): |
-      return mhpmevent6.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
-    reset_value(): |
-      return mhpmevent6.EN ? UNDEFINED_LEGAL : 0;
-  OF7:
-    alias: mhpmevent7.OF
-    location: 7
-    description: |
-      [when="mhpmevent7.EN == true"]
-      Shadow copy of mhpmevent7 overflow (OF) bit.
-
-      [when="mhpmevent7.EN == false"]
-      This field is read-only zero because the event is not enabled.
-    type(): |
-      return mhpmevent7.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
-    reset_value(): |
-      return mhpmevent7.EN ? UNDEFINED_LEGAL : 0;
-  OF8:
-    alias: mhpmevent8.OF
-    location: 8
-    description: |
-      [when="mhpmevent8.EN == true"]
-      Shadow copy of mhpmevent8 overflow (OF) bit.
-
-      [when="mhpmevent8.EN == false"]
-      This field is read-only zero because the event is not enabled.
-    type(): |
-      return mhpmevent8.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
-    reset_value(): |
-      return mhpmevent8.EN ? UNDEFINED_LEGAL : 0;
-  OF9:
-    alias: mhpmevent9.OF
-    location: 9
-    description: |
-      [when="mhpmevent9.EN == true"]
-      Shadow copy of mhpmevent9 overflow (OF) bit.
-
-      [when="mhpmevent9.EN == false"]
-      This field is read-only zero because the event is not enabled.
-    type(): |
-      return mhpmevent9.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
-    reset_value(): |
-      return mhpmevent9.EN ? UNDEFINED_LEGAL : 0;
-  OF10:
-    alias: mhpmevent10.OF
-    location: 10
-    description: |
-      [when="mhpmevent10.EN == true"]
-      Shadow copy of mhpmevent10 overflow (OF) bit.
-
-      [when="mhpmevent10.EN == false"]
-      This field is read-only zero because the event is not enabled.
-    type(): |
-      return mhpmevent10.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
-    reset_value(): |
-      return mhpmevent10.EN ? UNDEFINED_LEGAL : 0;
-  OF11:
-    alias: mhpmevent11.OF
-    location: 11
-    description: |
-      [when="mhpmevent11.EN == true"]
-      Shadow copy of mhpmevent11 overflow (OF) bit.
-
-      [when="mhpmevent11.EN == false"]
-      This field is read-only zero because the event is not enabled.
-    type(): |
-      return mhpmevent11.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
-    reset_value(): |
-      return mhpmevent11.EN ? UNDEFINED_LEGAL : 0;
-  OF12:
-    alias: mhpmevent12.OF
-    location: 12
-    description: |
-      [when="mhpmevent12.EN == true"]
-      Shadow copy of mhpmevent12 overflow (OF) bit.
-
-      [when="mhpmevent12.EN == false"]
-      This field is read-only zero because the event is not enabled.
-    type(): |
-      return mhpmevent12.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
-    reset_value(): |
-      return mhpmevent12.EN ? UNDEFINED_LEGAL : 0;
-  OF13:
-    alias: mhpmevent13.OF
-    location: 13
-    description: |
-      [when="mhpmevent13.EN == true"]
-      Shadow copy of mhpmevent13 overflow (OF) bit.
-
-      [when="mhpmevent13.EN == false"]
-      This field is read-only zero because the event is not enabled.
-    type(): |
-      return mhpmevent13.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
-    reset_value(): |
-      return mhpmevent13.EN ? UNDEFINED_LEGAL : 0;
-  OF14:
-    alias: mhpmevent14.OF
-    location: 14
-    description: |
-      [when="mhpmevent14.EN == true"]
-      Shadow copy of mhpmevent14 overflow (OF) bit.
-
-      [when="mhpmevent14.EN == false"]
-      This field is read-only zero because the event is not enabled.
-    type(): |
-      return mhpmevent14.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
-    reset_value(): |
-      return mhpmevent14.EN ? UNDEFINED_LEGAL : 0;
-  OF15:
-    alias: mhpmevent15.OF
-    location: 15
-    description: |
-      [when="mhpmevent15.EN == true"]
-      Shadow copy of mhpmevent15 overflow (OF) bit.
-
-      [when="mhpmevent15.EN == false"]
-      This field is read-only zero because the event is not enabled.
-    type(): |
-      return mhpmevent15.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
-    reset_value(): |
-      return mhpmevent15.EN ? UNDEFINED_LEGAL : 0;
-  OF16:
-    alias: mhpmevent16.OF
-    location: 16
-    description: |
-      [when="mhpmevent16.EN == true"]
-      Shadow copy of mhpmevent16 overflow (OF) bit.
-
-      [when="mhpmevent16.EN == false"]
-      This field is read-only zero because the event is not enabled.
-    type(): |
-      return mhpmevent16.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
-    reset_value(): |
-      return mhpmevent16.EN ? UNDEFINED_LEGAL : 0;
-  OF17:
-    alias: mhpmevent17.OF
-    location: 17
-    description: |
-      [when="mhpmevent17.EN == true"]
-      Shadow copy of mhpmevent17 overflow (OF) bit.
-
-      [when="mhpmevent17.EN == false"]
-      This field is read-only zero because the event is not enabled.
-    type(): |
-      return mhpmevent17.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
-    reset_value(): |
-      return mhpmevent17.EN ? UNDEFINED_LEGAL : 0;
-  OF18:
-    alias: mhpmevent18.OF
-    location: 18
-    description: |
-      [when="mhpmevent18.EN == true"]
-      Shadow copy of mhpmevent18 overflow (OF) bit.
-
-      [when="mhpmevent18.EN == false"]
-      This field is read-only zero because the event is not enabled.
-    type(): |
-      return mhpmevent18.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
-    reset_value(): |
-      return mhpmevent18.EN ? UNDEFINED_LEGAL : 0;
-  OF19:
-    alias: mhpmevent19.OF
-    location: 19
-    description: |
-      [when="mhpmevent19.EN == true"]
-      Shadow copy of mhpmevent19 overflow (OF) bit.
-
-      [when="mhpmevent19.EN == false"]
-      This field is read-only zero because the event is not enabled.
-    type(): |
-      return mhpmevent19.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
-    reset_value(): |
-      return mhpmevent19.EN ? UNDEFINED_LEGAL : 0;
-  OF20:
-    alias: mhpmevent20.OF
-    location: 20
-    description: |
-      [when="mhpmevent20.EN == true"]
-      Shadow copy of mhpmevent20 overflow (OF) bit.
-
-      [when="mhpmevent20.EN == false"]
-      This field is read-only zero because the event is not enabled.
-    type(): |
-      return mhpmevent20.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
-    reset_value(): |
-      return mhpmevent20.EN ? UNDEFINED_LEGAL : 0;
-  OF21:
-    alias: mhpmevent21.OF
-    location: 21
-    description: |
-      [when="mhpmevent21.EN == true"]
-      Shadow copy of mhpmevent21 overflow (OF) bit.
-
-      [when="mhpmevent21.EN == false"]
-      This field is read-only zero because the event is not enabled.
-    type(): |
-      return mhpmevent21.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
-    reset_value(): |
-      return mhpmevent21.EN ? UNDEFINED_LEGAL : 0;
-  OF22:
-    alias: mhpmevent22.OF
-    location: 22
-    description: |
-      [when="mhpmevent22.EN == true"]
-      Shadow copy of mhpmevent22 overflow (OF) bit.
-
-      [when="mhpmevent22.EN == false"]
-      This field is read-only zero because the event is not enabled.
-    type(): |
-      return mhpmevent22.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
-    reset_value(): |
-      return mhpmevent22.EN ? UNDEFINED_LEGAL : 0;
-  OF23:
-    alias: mhpmevent23.OF
-    location: 23
-    description: |
-      [when="mhpmevent23.EN == true"]
-      Shadow copy of mhpmevent23 overflow (OF) bit.
-
-      [when="mhpmevent23.EN == false"]
-      This field is read-only zero because the event is not enabled.
-    type(): |
-      return mhpmevent23.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
-    reset_value(): |
-      return mhpmevent23.EN ? UNDEFINED_LEGAL : 0;
-  OF24:
-    alias: mhpmevent24.OF
-    location: 24
-    description: |
-      [when="mhpmevent24.EN == true"]
-      Shadow copy of mhpmevent24 overflow (OF) bit.
-
-      [when="mhpmevent24.EN == false"]
-      This field is read-only zero because the event is not enabled.
-    type(): |
-      return mhpmevent24.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
-    reset_value(): |
-      return mhpmevent24.EN ? UNDEFINED_LEGAL : 0;
-  OF25:
-    alias: mhpmevent25.OF
-    location: 25
-    description: |
-      [when="mhpmevent25.EN == true"]
-      Shadow copy of mhpmevent25 overflow (OF) bit.
-
-      [when="mhpmevent25.EN == false"]
-      This field is read-only zero because the event is not enabled.
-    type(): |
-      return mhpmevent25.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
-    reset_value(): |
-      return mhpmevent25.EN ? UNDEFINED_LEGAL : 0;
-  OF26:
-    alias: mhpmevent26.OF
-    location: 26
-    description: |
-      [when="mhpmevent26.EN == true"]
-      Shadow copy of mhpmevent26 overflow (OF) bit.
-
-      [when="mhpmevent26.EN == false"]
-      This field is read-only zero because the event is not enabled.
-    type(): |
-      return mhpmevent26.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
-    reset_value(): |
-      return mhpmevent26.EN ? UNDEFINED_LEGAL : 0;
-  OF27:
-    alias: mhpmevent27.OF
-    location: 27
-    description: |
-      [when="mhpmevent27.EN == true"]
-      Shadow copy of mhpmevent27 overflow (OF) bit.
-
-      [when="mhpmevent27.EN == false"]
-      This field is read-only zero because the event is not enabled.
-    type(): |
-      return mhpmevent27.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
-    reset_value(): |
-      return mhpmevent27.EN ? UNDEFINED_LEGAL : 0;
-  OF28:
-    alias: mhpmevent28.OF
-    location: 28
-    description: |
-      [when="mhpmevent28.EN == true"]
-      Shadow copy of mhpmevent28 overflow (OF) bit.
-
-      [when="mhpmevent28.EN == false"]
-      This field is read-only zero because the event is not enabled.
-    type(): |
-      return mhpmevent28.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
-    reset_value(): |
-      return mhpmevent28.EN ? UNDEFINED_LEGAL : 0;
-  OF29:
-    alias: mhpmevent29.OF
-    location: 29
-    description: |
-      [when="mhpmevent29.EN == true"]
-      Shadow copy of mhpmevent29 overflow (OF) bit.
-
-      [when="mhpmevent29.EN == false"]
-      This field is read-only zero because the event is not enabled.
-    type(): |
-      return mhpmevent29.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
-    reset_value(): |
-      return mhpmevent29.EN ? UNDEFINED_LEGAL : 0;
-  OF30:
-    alias: mhpmevent30.OF
-    location: 30
-    description: |
-      [when="mhpmevent30.EN == true"]
-      Shadow copy of mhpmevent30 overflow (OF) bit.
-
-      [when="mhpmevent30.EN == false"]
-      This field is read-only zero because the event is not enabled.
-    type(): |
-      return mhpmevent30.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
-    reset_value(): |
-      return mhpmevent30.EN ? UNDEFINED_LEGAL : 0;
-  OF31:
-    alias: mhpmevent31.OF
-    location: 31
-    description: |
-      [when="mhpmevent31.EN == true"]
-      Shadow copy of mhpmevent31 overflow (OF) bit.
-
-      [when="mhpmevent31.EN == false"]
-      This field is read-only zero because the event is not enabled.
-    type(): |
-      return mhpmevent31.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
-    reset_value(): |
-      return mhpmevent31.EN ? UNDEFINED_LEGAL : 0;
-
-sw_read(): |
-  Bits<32> mask;
-  if (mode() == PrivilegeMode::VS) {
-    # in VS-mode, scountovf.OFX access is determined by mcounteren/hcounteren
-    mask = $bits(CSR[mcounteren]) & $bits(CSR[hcounteren]);
-  } else {
-    # in M-mode and S-mode, scountovf.OFX access is determined by mcounteren/scounteren
-    mask = $bits(CSR[mcounteren]) & $bits(CSR[scounteren]);
-  }
-
-  Bits<32> value =
-    (CSR[mhpmevent3].OF << 3) |
-    (CSR[mhpmevent4].OF << 4) |
-    (CSR[mhpmevent5].OF << 5) |
-    (CSR[mhpmevent6].OF << 6) |
-    (CSR[mhpmevent7].OF << 7) |
-    (CSR[mhpmevent8].OF << 8) |
-    (CSR[mhpmevent9].OF << 9) |
-    (CSR[mhpmevent10].OF << 10) |
-    (CSR[mhpmevent11].OF << 11) |
-    (CSR[mhpmevent12].OF << 12) |
-    (CSR[mhpmevent13].OF << 13) |
-    (CSR[mhpmevent14].OF << 14) |
-    (CSR[mhpmevent15].OF << 15) |
-    (CSR[mhpmevent16].OF << 16) |
-    (CSR[mhpmevent17].OF << 17) |
-    (CSR[mhpmevent18].OF << 18) |
-    (CSR[mhpmevent19].OF << 19) |
-    (CSR[mhpmevent20].OF << 20) |
-    (CSR[mhpmevent21].OF << 21) |
-    (CSR[mhpmevent22].OF << 22) |
-    (CSR[mhpmevent23].OF << 23) |
-    (CSR[mhpmevent24].OF << 24) |
-    (CSR[mhpmevent25].OF << 25) |
-    (CSR[mhpmevent26].OF << 26) |
-    (CSR[mhpmevent27].OF << 27) |
-    (CSR[mhpmevent28].OF << 28) |
-    (CSR[mhpmevent29].OF << 29) |
-    (CSR[mhpmevent30].OF << 30) |
-    (CSR[mhpmevent31].OF << 31);
-
-  return value & mask;

From bfb2ce52f96b8e704ffda245261439650e199709 Mon Sep 17 00:00:00 2001
From: syedowaisalishah <alishahowais@gmail.com>
Date: Mon, 5 May 2025 15:39:59 +0000
Subject: [PATCH 10/15] docs(sscofpmf): add CSR yaml and layout file for
 scountovf

---
 arch/csr/Sscofpmf/scountovf.yaml | 447 +++++++++++++++++++++++++++++++
 1 file changed, 447 insertions(+)
 create mode 100644 arch/csr/Sscofpmf/scountovf.yaml

diff --git a/arch/csr/Sscofpmf/scountovf.yaml b/arch/csr/Sscofpmf/scountovf.yaml
new file mode 100644
index 000000000..eeef9be63
--- /dev/null
+++ b/arch/csr/Sscofpmf/scountovf.yaml
@@ -0,0 +1,447 @@
+# yaml-language-server: $schema=../../../schemas/csr_schema.json
+
+# WARNING: This file is auto-generated from arch/csr/Sscofpmf/scountovf.layout
+$schema: csr_schema.json#
+kind: csr
+name: scountovf
+long_name: Supervisor Count Overflow
+address: 0xDA0
+priv_mode: S
+length: 32
+definedBy: Sscofpmf
+description: |
+  A 32-bit read-only
+  register that contains shadow copies of the OF bits in the 29 `mhpmevent` CSRs
+  (`mhpmevent3` - `mhpmevent31`) — where `scountovf` bit X corresponds to `mhpmeventX`.
+
+  This register enables supervisor-level overflow interrupt handler
+  software to quickly and easily determine which counter(s) have overflowed
+  (without needing to make an execution environment call or series of calls ultimately up to M-mode)
+
+  Read access to bit X is subject to the same `mcounteren` (or `mcounteren` and `hcounteren`)
+  CSRs that mediate access to the `hpmcounter` CSRs by S-mode (or VS-mode).
+  In M-mode, `scountovf` bit X is always readable. In S/HS-mode, `scountovf` bit X is readable
+  when `mcounteren` bit X is set, and otherwise reads as zero. Similarly, in VS mode,
+  `scountovf` bit X is readable when `mcounteren` bit X and `hcounteren` bit X are both set, and otherwise reads as zero.
+
+fields:
+  OF3:
+    alias: mhpmevent3.OF
+    location: 3
+    description: |
+      [when="mhpmevent3.EN == true"]
+      Shadow copy of mhpmevent3 overflow (OF) bit.
+
+      [when="mhpmevent3.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent3.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent3.EN ? UNDEFINED_LEGAL : 0;
+  OF4:
+    alias: mhpmevent4.OF
+    location: 4
+    description: |
+      [when="mhpmevent4.EN == true"]
+      Shadow copy of mhpmevent4 overflow (OF) bit.
+
+      [when="mhpmevent4.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent4.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent4.EN ? UNDEFINED_LEGAL : 0;
+  OF5:
+    alias: mhpmevent5.OF
+    location: 5
+    description: |
+      [when="mhpmevent5.EN == true"]
+      Shadow copy of mhpmevent5 overflow (OF) bit.
+
+      [when="mhpmevent5.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent5.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent5.EN ? UNDEFINED_LEGAL : 0;
+  OF6:
+    alias: mhpmevent6.OF
+    location: 6
+    description: |
+      [when="mhpmevent6.EN == true"]
+      Shadow copy of mhpmevent6 overflow (OF) bit.
+
+      [when="mhpmevent6.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent6.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent6.EN ? UNDEFINED_LEGAL : 0;
+  OF7:
+    alias: mhpmevent7.OF
+    location: 7
+    description: |
+      [when="mhpmevent7.EN == true"]
+      Shadow copy of mhpmevent7 overflow (OF) bit.
+
+      [when="mhpmevent7.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent7.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent7.EN ? UNDEFINED_LEGAL : 0;
+  OF8:
+    alias: mhpmevent8.OF
+    location: 8
+    description: |
+      [when="mhpmevent8.EN == true"]
+      Shadow copy of mhpmevent8 overflow (OF) bit.
+
+      [when="mhpmevent8.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent8.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent8.EN ? UNDEFINED_LEGAL : 0;
+  OF9:
+    alias: mhpmevent9.OF
+    location: 9
+    description: |
+      [when="mhpmevent9.EN == true"]
+      Shadow copy of mhpmevent9 overflow (OF) bit.
+
+      [when="mhpmevent9.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent9.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent9.EN ? UNDEFINED_LEGAL : 0;
+  OF10:
+    alias: mhpmevent10.OF
+    location: 10
+    description: |
+      [when="mhpmevent10.EN == true"]
+      Shadow copy of mhpmevent10 overflow (OF) bit.
+
+      [when="mhpmevent10.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent10.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent10.EN ? UNDEFINED_LEGAL : 0;
+  OF11:
+    alias: mhpmevent11.OF
+    location: 11
+    description: |
+      [when="mhpmevent11.EN == true"]
+      Shadow copy of mhpmevent11 overflow (OF) bit.
+
+      [when="mhpmevent11.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent11.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent11.EN ? UNDEFINED_LEGAL : 0;
+  OF12:
+    alias: mhpmevent12.OF
+    location: 12
+    description: |
+      [when="mhpmevent12.EN == true"]
+      Shadow copy of mhpmevent12 overflow (OF) bit.
+
+      [when="mhpmevent12.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent12.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent12.EN ? UNDEFINED_LEGAL : 0;
+  OF13:
+    alias: mhpmevent13.OF
+    location: 13
+    description: |
+      [when="mhpmevent13.EN == true"]
+      Shadow copy of mhpmevent13 overflow (OF) bit.
+
+      [when="mhpmevent13.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent13.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent13.EN ? UNDEFINED_LEGAL : 0;
+  OF14:
+    alias: mhpmevent14.OF
+    location: 14
+    description: |
+      [when="mhpmevent14.EN == true"]
+      Shadow copy of mhpmevent14 overflow (OF) bit.
+
+      [when="mhpmevent14.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent14.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent14.EN ? UNDEFINED_LEGAL : 0;
+  OF15:
+    alias: mhpmevent15.OF
+    location: 15
+    description: |
+      [when="mhpmevent15.EN == true"]
+      Shadow copy of mhpmevent15 overflow (OF) bit.
+
+      [when="mhpmevent15.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent15.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent15.EN ? UNDEFINED_LEGAL : 0;
+  OF16:
+    alias: mhpmevent16.OF
+    location: 16
+    description: |
+      [when="mhpmevent16.EN == true"]
+      Shadow copy of mhpmevent16 overflow (OF) bit.
+
+      [when="mhpmevent16.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent16.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent16.EN ? UNDEFINED_LEGAL : 0;
+  OF17:
+    alias: mhpmevent17.OF
+    location: 17
+    description: |
+      [when="mhpmevent17.EN == true"]
+      Shadow copy of mhpmevent17 overflow (OF) bit.
+
+      [when="mhpmevent17.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent17.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent17.EN ? UNDEFINED_LEGAL : 0;
+  OF18:
+    alias: mhpmevent18.OF
+    location: 18
+    description: |
+      [when="mhpmevent18.EN == true"]
+      Shadow copy of mhpmevent18 overflow (OF) bit.
+
+      [when="mhpmevent18.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent18.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent18.EN ? UNDEFINED_LEGAL : 0;
+  OF19:
+    alias: mhpmevent19.OF
+    location: 19
+    description: |
+      [when="mhpmevent19.EN == true"]
+      Shadow copy of mhpmevent19 overflow (OF) bit.
+
+      [when="mhpmevent19.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent19.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent19.EN ? UNDEFINED_LEGAL : 0;
+  OF20:
+    alias: mhpmevent20.OF
+    location: 20
+    description: |
+      [when="mhpmevent20.EN == true"]
+      Shadow copy of mhpmevent20 overflow (OF) bit.
+
+      [when="mhpmevent20.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent20.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent20.EN ? UNDEFINED_LEGAL : 0;
+  OF21:
+    alias: mhpmevent21.OF
+    location: 21
+    description: |
+      [when="mhpmevent21.EN == true"]
+      Shadow copy of mhpmevent21 overflow (OF) bit.
+
+      [when="mhpmevent21.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent21.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent21.EN ? UNDEFINED_LEGAL : 0;
+  OF22:
+    alias: mhpmevent22.OF
+    location: 22
+    description: |
+      [when="mhpmevent22.EN == true"]
+      Shadow copy of mhpmevent22 overflow (OF) bit.
+
+      [when="mhpmevent22.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent22.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent22.EN ? UNDEFINED_LEGAL : 0;
+  OF23:
+    alias: mhpmevent23.OF
+    location: 23
+    description: |
+      [when="mhpmevent23.EN == true"]
+      Shadow copy of mhpmevent23 overflow (OF) bit.
+
+      [when="mhpmevent23.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent23.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent23.EN ? UNDEFINED_LEGAL : 0;
+  OF24:
+    alias: mhpmevent24.OF
+    location: 24
+    description: |
+      [when="mhpmevent24.EN == true"]
+      Shadow copy of mhpmevent24 overflow (OF) bit.
+
+      [when="mhpmevent24.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent24.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent24.EN ? UNDEFINED_LEGAL : 0;
+  OF25:
+    alias: mhpmevent25.OF
+    location: 25
+    description: |
+      [when="mhpmevent25.EN == true"]
+      Shadow copy of mhpmevent25 overflow (OF) bit.
+
+      [when="mhpmevent25.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent25.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent25.EN ? UNDEFINED_LEGAL : 0;
+  OF26:
+    alias: mhpmevent26.OF
+    location: 26
+    description: |
+      [when="mhpmevent26.EN == true"]
+      Shadow copy of mhpmevent26 overflow (OF) bit.
+
+      [when="mhpmevent26.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent26.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent26.EN ? UNDEFINED_LEGAL : 0;
+  OF27:
+    alias: mhpmevent27.OF
+    location: 27
+    description: |
+      [when="mhpmevent27.EN == true"]
+      Shadow copy of mhpmevent27 overflow (OF) bit.
+
+      [when="mhpmevent27.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent27.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent27.EN ? UNDEFINED_LEGAL : 0;
+  OF28:
+    alias: mhpmevent28.OF
+    location: 28
+    description: |
+      [when="mhpmevent28.EN == true"]
+      Shadow copy of mhpmevent28 overflow (OF) bit.
+
+      [when="mhpmevent28.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent28.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent28.EN ? UNDEFINED_LEGAL : 0;
+  OF29:
+    alias: mhpmevent29.OF
+    location: 29
+    description: |
+      [when="mhpmevent29.EN == true"]
+      Shadow copy of mhpmevent29 overflow (OF) bit.
+
+      [when="mhpmevent29.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent29.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent29.EN ? UNDEFINED_LEGAL : 0;
+  OF30:
+    alias: mhpmevent30.OF
+    location: 30
+    description: |
+      [when="mhpmevent30.EN == true"]
+      Shadow copy of mhpmevent30 overflow (OF) bit.
+
+      [when="mhpmevent30.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent30.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent30.EN ? UNDEFINED_LEGAL : 0;
+  OF31:
+    alias: mhpmevent31.OF
+    location: 31
+    description: |
+      [when="mhpmevent31.EN == true"]
+      Shadow copy of mhpmevent31 overflow (OF) bit.
+
+      [when="mhpmevent31.EN == false"]
+      This field is read-only zero because the event is not enabled.
+    type(): |
+      return mhpmevent31.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+    reset_value(): |
+      return mhpmevent31.EN ? UNDEFINED_LEGAL : 0;
+
+sw_read(): |
+  Bits<32> mask;
+  if (mode() == PrivilegeMode::VS) {
+    # in VS-mode, scountovf.OFX access is determined by mcounteren/hcounteren
+    mask = $bits(CSR[mcounteren]) & $bits(CSR[hcounteren]);
+  } else {
+    # in M-mode and S-mode, scountovf.OFX access is determined by mcounteren/scounteren
+    mask = $bits(CSR[mcounteren]) & $bits(CSR[scounteren]);
+  }
+
+  Bits<32> value =
+    (CSR[mhpmevent3].OF << 3) |
+    (CSR[mhpmevent4].OF << 4) |
+    (CSR[mhpmevent5].OF << 5) |
+    (CSR[mhpmevent6].OF << 6) |
+    (CSR[mhpmevent7].OF << 7) |
+    (CSR[mhpmevent8].OF << 8) |
+    (CSR[mhpmevent9].OF << 9) |
+    (CSR[mhpmevent10].OF << 10) |
+    (CSR[mhpmevent11].OF << 11) |
+    (CSR[mhpmevent12].OF << 12) |
+    (CSR[mhpmevent13].OF << 13) |
+    (CSR[mhpmevent14].OF << 14) |
+    (CSR[mhpmevent15].OF << 15) |
+    (CSR[mhpmevent16].OF << 16) |
+    (CSR[mhpmevent17].OF << 17) |
+    (CSR[mhpmevent18].OF << 18) |
+    (CSR[mhpmevent19].OF << 19) |
+    (CSR[mhpmevent20].OF << 20) |
+    (CSR[mhpmevent21].OF << 21) |
+    (CSR[mhpmevent22].OF << 22) |
+    (CSR[mhpmevent23].OF << 23) |
+    (CSR[mhpmevent24].OF << 24) |
+    (CSR[mhpmevent25].OF << 25) |
+    (CSR[mhpmevent26].OF << 26) |
+    (CSR[mhpmevent27].OF << 27) |
+    (CSR[mhpmevent28].OF << 28) |
+    (CSR[mhpmevent29].OF << 29) |
+    (CSR[mhpmevent30].OF << 30) |
+    (CSR[mhpmevent31].OF << 31);
+
+  return value & mask;

From b70067c3f4e96d7a90896c69de180ea0a14e2ca7 Mon Sep 17 00:00:00 2001
From: syedowaisalishah <alishahowais@gmail.com>
Date: Tue, 6 May 2025 13:42:17 +0000
Subject: [PATCH 11/15] docs(sscofpmf): add CSR yaml and layout file for
 scountovf

---
 arch/csr/Sscofpmf/scountovf.layout |   4 +-
 arch/csr/Sscofpmf/scountovf.yaml   | 116 ++++++++++++++---------------
 2 files changed, 60 insertions(+), 60 deletions(-)

diff --git a/arch/csr/Sscofpmf/scountovf.layout b/arch/csr/Sscofpmf/scountovf.layout
index 4dde07c05..a178d6149 100644
--- a/arch/csr/Sscofpmf/scountovf.layout
+++ b/arch/csr/Sscofpmf/scountovf.layout
@@ -35,9 +35,9 @@ fields:
         [when="mhpmevent<%= of_num %>.EN == false"]
         This field is read-only zero because the event is not enabled.
       type(): |
-        return mhpmevent<%= of_num %>.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+        return CSR[mhpmevent<%= of_num %>].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
       reset_value(): |
-        return mhpmevent<%= of_num %>.EN ? UNDEFINED_LEGAL : 0;
+        return CSR[mhpmevent<%= of_num %>].EN ? UNDEFINED_LEGAL : 0;
   <%- end -%>
 
 sw_read(): |
diff --git a/arch/csr/Sscofpmf/scountovf.yaml b/arch/csr/Sscofpmf/scountovf.yaml
index eeef9be63..790b1daff 100644
--- a/arch/csr/Sscofpmf/scountovf.yaml
+++ b/arch/csr/Sscofpmf/scountovf.yaml
@@ -35,9 +35,9 @@ fields:
       [when="mhpmevent3.EN == false"]
       This field is read-only zero because the event is not enabled.
     type(): |
-      return mhpmevent3.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return CSR[mhpmevent3].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return mhpmevent3.EN ? UNDEFINED_LEGAL : 0;
+      return CSR[mhpmevent3].EN ? UNDEFINED_LEGAL : 0;
   OF4:
     alias: mhpmevent4.OF
     location: 4
@@ -48,9 +48,9 @@ fields:
       [when="mhpmevent4.EN == false"]
       This field is read-only zero because the event is not enabled.
     type(): |
-      return mhpmevent4.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return CSR[mhpmevent4].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return mhpmevent4.EN ? UNDEFINED_LEGAL : 0;
+      return CSR[mhpmevent4].EN ? UNDEFINED_LEGAL : 0;
   OF5:
     alias: mhpmevent5.OF
     location: 5
@@ -61,9 +61,9 @@ fields:
       [when="mhpmevent5.EN == false"]
       This field is read-only zero because the event is not enabled.
     type(): |
-      return mhpmevent5.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return CSR[mhpmevent5].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return mhpmevent5.EN ? UNDEFINED_LEGAL : 0;
+      return CSR[mhpmevent5].EN ? UNDEFINED_LEGAL : 0;
   OF6:
     alias: mhpmevent6.OF
     location: 6
@@ -74,9 +74,9 @@ fields:
       [when="mhpmevent6.EN == false"]
       This field is read-only zero because the event is not enabled.
     type(): |
-      return mhpmevent6.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return CSR[mhpmevent6].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return mhpmevent6.EN ? UNDEFINED_LEGAL : 0;
+      return CSR[mhpmevent6].EN ? UNDEFINED_LEGAL : 0;
   OF7:
     alias: mhpmevent7.OF
     location: 7
@@ -87,9 +87,9 @@ fields:
       [when="mhpmevent7.EN == false"]
       This field is read-only zero because the event is not enabled.
     type(): |
-      return mhpmevent7.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return CSR[mhpmevent7].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return mhpmevent7.EN ? UNDEFINED_LEGAL : 0;
+      return CSR[mhpmevent7].EN ? UNDEFINED_LEGAL : 0;
   OF8:
     alias: mhpmevent8.OF
     location: 8
@@ -100,9 +100,9 @@ fields:
       [when="mhpmevent8.EN == false"]
       This field is read-only zero because the event is not enabled.
     type(): |
-      return mhpmevent8.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return CSR[mhpmevent8].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return mhpmevent8.EN ? UNDEFINED_LEGAL : 0;
+      return CSR[mhpmevent8].EN ? UNDEFINED_LEGAL : 0;
   OF9:
     alias: mhpmevent9.OF
     location: 9
@@ -113,9 +113,9 @@ fields:
       [when="mhpmevent9.EN == false"]
       This field is read-only zero because the event is not enabled.
     type(): |
-      return mhpmevent9.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return CSR[mhpmevent9].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return mhpmevent9.EN ? UNDEFINED_LEGAL : 0;
+      return CSR[mhpmevent9].EN ? UNDEFINED_LEGAL : 0;
   OF10:
     alias: mhpmevent10.OF
     location: 10
@@ -126,9 +126,9 @@ fields:
       [when="mhpmevent10.EN == false"]
       This field is read-only zero because the event is not enabled.
     type(): |
-      return mhpmevent10.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return CSR[mhpmevent10].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return mhpmevent10.EN ? UNDEFINED_LEGAL : 0;
+      return CSR[mhpmevent10].EN ? UNDEFINED_LEGAL : 0;
   OF11:
     alias: mhpmevent11.OF
     location: 11
@@ -139,9 +139,9 @@ fields:
       [when="mhpmevent11.EN == false"]
       This field is read-only zero because the event is not enabled.
     type(): |
-      return mhpmevent11.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return CSR[mhpmevent11].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return mhpmevent11.EN ? UNDEFINED_LEGAL : 0;
+      return CSR[mhpmevent11].EN ? UNDEFINED_LEGAL : 0;
   OF12:
     alias: mhpmevent12.OF
     location: 12
@@ -152,9 +152,9 @@ fields:
       [when="mhpmevent12.EN == false"]
       This field is read-only zero because the event is not enabled.
     type(): |
-      return mhpmevent12.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return CSR[mhpmevent12].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return mhpmevent12.EN ? UNDEFINED_LEGAL : 0;
+      return CSR[mhpmevent12].EN ? UNDEFINED_LEGAL : 0;
   OF13:
     alias: mhpmevent13.OF
     location: 13
@@ -165,9 +165,9 @@ fields:
       [when="mhpmevent13.EN == false"]
       This field is read-only zero because the event is not enabled.
     type(): |
-      return mhpmevent13.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return CSR[mhpmevent13].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return mhpmevent13.EN ? UNDEFINED_LEGAL : 0;
+      return CSR[mhpmevent13].EN ? UNDEFINED_LEGAL : 0;
   OF14:
     alias: mhpmevent14.OF
     location: 14
@@ -178,9 +178,9 @@ fields:
       [when="mhpmevent14.EN == false"]
       This field is read-only zero because the event is not enabled.
     type(): |
-      return mhpmevent14.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return CSR[mhpmevent14].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return mhpmevent14.EN ? UNDEFINED_LEGAL : 0;
+      return CSR[mhpmevent14].EN ? UNDEFINED_LEGAL : 0;
   OF15:
     alias: mhpmevent15.OF
     location: 15
@@ -191,9 +191,9 @@ fields:
       [when="mhpmevent15.EN == false"]
       This field is read-only zero because the event is not enabled.
     type(): |
-      return mhpmevent15.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return CSR[mhpmevent15].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return mhpmevent15.EN ? UNDEFINED_LEGAL : 0;
+      return CSR[mhpmevent15].EN ? UNDEFINED_LEGAL : 0;
   OF16:
     alias: mhpmevent16.OF
     location: 16
@@ -204,9 +204,9 @@ fields:
       [when="mhpmevent16.EN == false"]
       This field is read-only zero because the event is not enabled.
     type(): |
-      return mhpmevent16.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return CSR[mhpmevent16].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return mhpmevent16.EN ? UNDEFINED_LEGAL : 0;
+      return CSR[mhpmevent16].EN ? UNDEFINED_LEGAL : 0;
   OF17:
     alias: mhpmevent17.OF
     location: 17
@@ -217,9 +217,9 @@ fields:
       [when="mhpmevent17.EN == false"]
       This field is read-only zero because the event is not enabled.
     type(): |
-      return mhpmevent17.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return CSR[mhpmevent17].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return mhpmevent17.EN ? UNDEFINED_LEGAL : 0;
+      return CSR[mhpmevent17].EN ? UNDEFINED_LEGAL : 0;
   OF18:
     alias: mhpmevent18.OF
     location: 18
@@ -230,9 +230,9 @@ fields:
       [when="mhpmevent18.EN == false"]
       This field is read-only zero because the event is not enabled.
     type(): |
-      return mhpmevent18.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return CSR[mhpmevent18].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return mhpmevent18.EN ? UNDEFINED_LEGAL : 0;
+      return CSR[mhpmevent18].EN ? UNDEFINED_LEGAL : 0;
   OF19:
     alias: mhpmevent19.OF
     location: 19
@@ -243,9 +243,9 @@ fields:
       [when="mhpmevent19.EN == false"]
       This field is read-only zero because the event is not enabled.
     type(): |
-      return mhpmevent19.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return CSR[mhpmevent19].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return mhpmevent19.EN ? UNDEFINED_LEGAL : 0;
+      return CSR[mhpmevent19].EN ? UNDEFINED_LEGAL : 0;
   OF20:
     alias: mhpmevent20.OF
     location: 20
@@ -256,9 +256,9 @@ fields:
       [when="mhpmevent20.EN == false"]
       This field is read-only zero because the event is not enabled.
     type(): |
-      return mhpmevent20.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return CSR[mhpmevent20].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return mhpmevent20.EN ? UNDEFINED_LEGAL : 0;
+      return CSR[mhpmevent20].EN ? UNDEFINED_LEGAL : 0;
   OF21:
     alias: mhpmevent21.OF
     location: 21
@@ -269,9 +269,9 @@ fields:
       [when="mhpmevent21.EN == false"]
       This field is read-only zero because the event is not enabled.
     type(): |
-      return mhpmevent21.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return CSR[mhpmevent21].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return mhpmevent21.EN ? UNDEFINED_LEGAL : 0;
+      return CSR[mhpmevent21].EN ? UNDEFINED_LEGAL : 0;
   OF22:
     alias: mhpmevent22.OF
     location: 22
@@ -282,9 +282,9 @@ fields:
       [when="mhpmevent22.EN == false"]
       This field is read-only zero because the event is not enabled.
     type(): |
-      return mhpmevent22.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return CSR[mhpmevent22].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return mhpmevent22.EN ? UNDEFINED_LEGAL : 0;
+      return CSR[mhpmevent22].EN ? UNDEFINED_LEGAL : 0;
   OF23:
     alias: mhpmevent23.OF
     location: 23
@@ -295,9 +295,9 @@ fields:
       [when="mhpmevent23.EN == false"]
       This field is read-only zero because the event is not enabled.
     type(): |
-      return mhpmevent23.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return CSR[mhpmevent23].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return mhpmevent23.EN ? UNDEFINED_LEGAL : 0;
+      return CSR[mhpmevent23].EN ? UNDEFINED_LEGAL : 0;
   OF24:
     alias: mhpmevent24.OF
     location: 24
@@ -308,9 +308,9 @@ fields:
       [when="mhpmevent24.EN == false"]
       This field is read-only zero because the event is not enabled.
     type(): |
-      return mhpmevent24.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return CSR[mhpmevent24].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return mhpmevent24.EN ? UNDEFINED_LEGAL : 0;
+      return CSR[mhpmevent24].EN ? UNDEFINED_LEGAL : 0;
   OF25:
     alias: mhpmevent25.OF
     location: 25
@@ -321,9 +321,9 @@ fields:
       [when="mhpmevent25.EN == false"]
       This field is read-only zero because the event is not enabled.
     type(): |
-      return mhpmevent25.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return CSR[mhpmevent25].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return mhpmevent25.EN ? UNDEFINED_LEGAL : 0;
+      return CSR[mhpmevent25].EN ? UNDEFINED_LEGAL : 0;
   OF26:
     alias: mhpmevent26.OF
     location: 26
@@ -334,9 +334,9 @@ fields:
       [when="mhpmevent26.EN == false"]
       This field is read-only zero because the event is not enabled.
     type(): |
-      return mhpmevent26.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return CSR[mhpmevent26].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return mhpmevent26.EN ? UNDEFINED_LEGAL : 0;
+      return CSR[mhpmevent26].EN ? UNDEFINED_LEGAL : 0;
   OF27:
     alias: mhpmevent27.OF
     location: 27
@@ -347,9 +347,9 @@ fields:
       [when="mhpmevent27.EN == false"]
       This field is read-only zero because the event is not enabled.
     type(): |
-      return mhpmevent27.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return CSR[mhpmevent27].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return mhpmevent27.EN ? UNDEFINED_LEGAL : 0;
+      return CSR[mhpmevent27].EN ? UNDEFINED_LEGAL : 0;
   OF28:
     alias: mhpmevent28.OF
     location: 28
@@ -360,9 +360,9 @@ fields:
       [when="mhpmevent28.EN == false"]
       This field is read-only zero because the event is not enabled.
     type(): |
-      return mhpmevent28.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return CSR[mhpmevent28].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return mhpmevent28.EN ? UNDEFINED_LEGAL : 0;
+      return CSR[mhpmevent28].EN ? UNDEFINED_LEGAL : 0;
   OF29:
     alias: mhpmevent29.OF
     location: 29
@@ -373,9 +373,9 @@ fields:
       [when="mhpmevent29.EN == false"]
       This field is read-only zero because the event is not enabled.
     type(): |
-      return mhpmevent29.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return CSR[mhpmevent29].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return mhpmevent29.EN ? UNDEFINED_LEGAL : 0;
+      return CSR[mhpmevent29].EN ? UNDEFINED_LEGAL : 0;
   OF30:
     alias: mhpmevent30.OF
     location: 30
@@ -386,9 +386,9 @@ fields:
       [when="mhpmevent30.EN == false"]
       This field is read-only zero because the event is not enabled.
     type(): |
-      return mhpmevent30.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return CSR[mhpmevent30].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return mhpmevent30.EN ? UNDEFINED_LEGAL : 0;
+      return CSR[mhpmevent30].EN ? UNDEFINED_LEGAL : 0;
   OF31:
     alias: mhpmevent31.OF
     location: 31
@@ -399,9 +399,9 @@ fields:
       [when="mhpmevent31.EN == false"]
       This field is read-only zero because the event is not enabled.
     type(): |
-      return mhpmevent31.EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return CSR[mhpmevent31].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return mhpmevent31.EN ? UNDEFINED_LEGAL : 0;
+      return CSR[mhpmevent31].EN ? UNDEFINED_LEGAL : 0;
 
 sw_read(): |
   Bits<32> mask;

From cde11e9c82f6c437d435f197401035ec6550c528 Mon Sep 17 00:00:00 2001
From: syedowaisalishah <alishahowais@gmail.com>
Date: Wed, 7 May 2025 18:41:48 +0000
Subject: [PATCH 12/15] =?UTF-8?q?feat(zihpm):=20add=20Sscofpmf=20fields=20?=
 =?UTF-8?q?to=20mhpmeventN.layout=20and=20regenerate=20mhpmevent3=E2=80=93?=
 =?UTF-8?q?31?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

---
 arch/csr/Zihpm/mhpmevent10.yaml  | 12 ++++++++----
 arch/csr/Zihpm/mhpmevent11.yaml  | 12 ++++++++----
 arch/csr/Zihpm/mhpmevent12.yaml  | 12 ++++++++----
 arch/csr/Zihpm/mhpmevent13.yaml  | 12 ++++++++----
 arch/csr/Zihpm/mhpmevent14.yaml  | 12 ++++++++----
 arch/csr/Zihpm/mhpmevent15.yaml  | 12 ++++++++----
 arch/csr/Zihpm/mhpmevent16.yaml  | 12 ++++++++----
 arch/csr/Zihpm/mhpmevent17.yaml  | 12 ++++++++----
 arch/csr/Zihpm/mhpmevent18.yaml  | 12 ++++++++----
 arch/csr/Zihpm/mhpmevent19.yaml  | 12 ++++++++----
 arch/csr/Zihpm/mhpmevent20.yaml  | 12 ++++++++----
 arch/csr/Zihpm/mhpmevent21.yaml  | 12 ++++++++----
 arch/csr/Zihpm/mhpmevent22.yaml  | 12 ++++++++----
 arch/csr/Zihpm/mhpmevent23.yaml  | 12 ++++++++----
 arch/csr/Zihpm/mhpmevent24.yaml  | 12 ++++++++----
 arch/csr/Zihpm/mhpmevent25.yaml  | 12 ++++++++----
 arch/csr/Zihpm/mhpmevent26.yaml  | 12 ++++++++----
 arch/csr/Zihpm/mhpmevent27.yaml  | 12 ++++++++----
 arch/csr/Zihpm/mhpmevent28.yaml  | 12 ++++++++----
 arch/csr/Zihpm/mhpmevent29.yaml  | 12 ++++++++----
 arch/csr/Zihpm/mhpmevent3.yaml   | 12 ++++++++----
 arch/csr/Zihpm/mhpmevent30.yaml  | 12 ++++++++----
 arch/csr/Zihpm/mhpmevent31.yaml  | 12 ++++++++----
 arch/csr/Zihpm/mhpmevent4.yaml   | 12 ++++++++----
 arch/csr/Zihpm/mhpmevent5.yaml   | 12 ++++++++----
 arch/csr/Zihpm/mhpmevent6.yaml   | 12 ++++++++----
 arch/csr/Zihpm/mhpmevent7.yaml   | 12 ++++++++----
 arch/csr/Zihpm/mhpmevent8.yaml   | 12 ++++++++----
 arch/csr/Zihpm/mhpmevent9.yaml   | 12 ++++++++----
 arch/csr/Zihpm/mhpmeventN.layout | 12 ++++++++----
 30 files changed, 240 insertions(+), 120 deletions(-)

diff --git a/arch/csr/Zihpm/mhpmevent10.yaml b/arch/csr/Zihpm/mhpmevent10.yaml
index d5e3511e5..36f9eea40 100644
--- a/arch/csr/Zihpm/mhpmevent10.yaml
+++ b/arch/csr/Zihpm/mhpmevent10.yaml
@@ -71,7 +71,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [S, Sscofpmf]
   UINH:
     location: 60
     description: When set, mhpmcounter10 does not increment while the hart in operating in U-mode.
@@ -87,7 +88,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [U, Sscofpmf]
   VSINH:
     location: 59
     description: When set, mhpmcounter10 does not increment while the hart in operating in VS-mode.
@@ -103,7 +105,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   VUINH:
     location: 58
     description: When set, mhpmcounter10 does not increment while the hart in operating in VU-mode.
@@ -119,7 +122,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   EVENT:
     location: 57-0
     description: Event selector for performance counter `mhpmcounter10`.
diff --git a/arch/csr/Zihpm/mhpmevent11.yaml b/arch/csr/Zihpm/mhpmevent11.yaml
index 25acd4e78..6e3afb2d5 100644
--- a/arch/csr/Zihpm/mhpmevent11.yaml
+++ b/arch/csr/Zihpm/mhpmevent11.yaml
@@ -71,7 +71,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [S, Sscofpmf]
   UINH:
     location: 60
     description: When set, mhpmcounter11 does not increment while the hart in operating in U-mode.
@@ -87,7 +88,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [U, Sscofpmf]
   VSINH:
     location: 59
     description: When set, mhpmcounter11 does not increment while the hart in operating in VS-mode.
@@ -103,7 +105,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   VUINH:
     location: 58
     description: When set, mhpmcounter11 does not increment while the hart in operating in VU-mode.
@@ -119,7 +122,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   EVENT:
     location: 57-0
     description: Event selector for performance counter `mhpmcounter11`.
diff --git a/arch/csr/Zihpm/mhpmevent12.yaml b/arch/csr/Zihpm/mhpmevent12.yaml
index 3277d7992..a76e99b41 100644
--- a/arch/csr/Zihpm/mhpmevent12.yaml
+++ b/arch/csr/Zihpm/mhpmevent12.yaml
@@ -71,7 +71,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [S, Sscofpmf]
   UINH:
     location: 60
     description: When set, mhpmcounter12 does not increment while the hart in operating in U-mode.
@@ -87,7 +88,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [U, Sscofpmf]
   VSINH:
     location: 59
     description: When set, mhpmcounter12 does not increment while the hart in operating in VS-mode.
@@ -103,7 +105,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   VUINH:
     location: 58
     description: When set, mhpmcounter12 does not increment while the hart in operating in VU-mode.
@@ -119,7 +122,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   EVENT:
     location: 57-0
     description: Event selector for performance counter `mhpmcounter12`.
diff --git a/arch/csr/Zihpm/mhpmevent13.yaml b/arch/csr/Zihpm/mhpmevent13.yaml
index 8fe055a95..427c9c0f8 100644
--- a/arch/csr/Zihpm/mhpmevent13.yaml
+++ b/arch/csr/Zihpm/mhpmevent13.yaml
@@ -71,7 +71,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [S, Sscofpmf]
   UINH:
     location: 60
     description: When set, mhpmcounter13 does not increment while the hart in operating in U-mode.
@@ -87,7 +88,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [U, Sscofpmf]
   VSINH:
     location: 59
     description: When set, mhpmcounter13 does not increment while the hart in operating in VS-mode.
@@ -103,7 +105,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   VUINH:
     location: 58
     description: When set, mhpmcounter13 does not increment while the hart in operating in VU-mode.
@@ -119,7 +122,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   EVENT:
     location: 57-0
     description: Event selector for performance counter `mhpmcounter13`.
diff --git a/arch/csr/Zihpm/mhpmevent14.yaml b/arch/csr/Zihpm/mhpmevent14.yaml
index c4f64bcd0..bee86c431 100644
--- a/arch/csr/Zihpm/mhpmevent14.yaml
+++ b/arch/csr/Zihpm/mhpmevent14.yaml
@@ -71,7 +71,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [S, Sscofpmf]
   UINH:
     location: 60
     description: When set, mhpmcounter14 does not increment while the hart in operating in U-mode.
@@ -87,7 +88,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [U, Sscofpmf]
   VSINH:
     location: 59
     description: When set, mhpmcounter14 does not increment while the hart in operating in VS-mode.
@@ -103,7 +105,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   VUINH:
     location: 58
     description: When set, mhpmcounter14 does not increment while the hart in operating in VU-mode.
@@ -119,7 +122,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   EVENT:
     location: 57-0
     description: Event selector for performance counter `mhpmcounter14`.
diff --git a/arch/csr/Zihpm/mhpmevent15.yaml b/arch/csr/Zihpm/mhpmevent15.yaml
index bf73956a6..671a01564 100644
--- a/arch/csr/Zihpm/mhpmevent15.yaml
+++ b/arch/csr/Zihpm/mhpmevent15.yaml
@@ -71,7 +71,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [S, Sscofpmf]
   UINH:
     location: 60
     description: When set, mhpmcounter15 does not increment while the hart in operating in U-mode.
@@ -87,7 +88,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [U, Sscofpmf]
   VSINH:
     location: 59
     description: When set, mhpmcounter15 does not increment while the hart in operating in VS-mode.
@@ -103,7 +105,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   VUINH:
     location: 58
     description: When set, mhpmcounter15 does not increment while the hart in operating in VU-mode.
@@ -119,7 +122,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   EVENT:
     location: 57-0
     description: Event selector for performance counter `mhpmcounter15`.
diff --git a/arch/csr/Zihpm/mhpmevent16.yaml b/arch/csr/Zihpm/mhpmevent16.yaml
index 0f39bfbc9..25b9607bc 100644
--- a/arch/csr/Zihpm/mhpmevent16.yaml
+++ b/arch/csr/Zihpm/mhpmevent16.yaml
@@ -71,7 +71,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [S, Sscofpmf]
   UINH:
     location: 60
     description: When set, mhpmcounter16 does not increment while the hart in operating in U-mode.
@@ -87,7 +88,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [U, Sscofpmf]
   VSINH:
     location: 59
     description: When set, mhpmcounter16 does not increment while the hart in operating in VS-mode.
@@ -103,7 +105,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   VUINH:
     location: 58
     description: When set, mhpmcounter16 does not increment while the hart in operating in VU-mode.
@@ -119,7 +122,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   EVENT:
     location: 57-0
     description: Event selector for performance counter `mhpmcounter16`.
diff --git a/arch/csr/Zihpm/mhpmevent17.yaml b/arch/csr/Zihpm/mhpmevent17.yaml
index b442d54fb..e71d33f4a 100644
--- a/arch/csr/Zihpm/mhpmevent17.yaml
+++ b/arch/csr/Zihpm/mhpmevent17.yaml
@@ -71,7 +71,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [S, Sscofpmf]
   UINH:
     location: 60
     description: When set, mhpmcounter17 does not increment while the hart in operating in U-mode.
@@ -87,7 +88,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [U, Sscofpmf]
   VSINH:
     location: 59
     description: When set, mhpmcounter17 does not increment while the hart in operating in VS-mode.
@@ -103,7 +105,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   VUINH:
     location: 58
     description: When set, mhpmcounter17 does not increment while the hart in operating in VU-mode.
@@ -119,7 +122,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   EVENT:
     location: 57-0
     description: Event selector for performance counter `mhpmcounter17`.
diff --git a/arch/csr/Zihpm/mhpmevent18.yaml b/arch/csr/Zihpm/mhpmevent18.yaml
index 95f43e442..a7b6680cf 100644
--- a/arch/csr/Zihpm/mhpmevent18.yaml
+++ b/arch/csr/Zihpm/mhpmevent18.yaml
@@ -71,7 +71,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [S, Sscofpmf]
   UINH:
     location: 60
     description: When set, mhpmcounter18 does not increment while the hart in operating in U-mode.
@@ -87,7 +88,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [U, Sscofpmf]
   VSINH:
     location: 59
     description: When set, mhpmcounter18 does not increment while the hart in operating in VS-mode.
@@ -103,7 +105,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   VUINH:
     location: 58
     description: When set, mhpmcounter18 does not increment while the hart in operating in VU-mode.
@@ -119,7 +122,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   EVENT:
     location: 57-0
     description: Event selector for performance counter `mhpmcounter18`.
diff --git a/arch/csr/Zihpm/mhpmevent19.yaml b/arch/csr/Zihpm/mhpmevent19.yaml
index 1a1ced791..a01913b16 100644
--- a/arch/csr/Zihpm/mhpmevent19.yaml
+++ b/arch/csr/Zihpm/mhpmevent19.yaml
@@ -71,7 +71,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [S, Sscofpmf]
   UINH:
     location: 60
     description: When set, mhpmcounter19 does not increment while the hart in operating in U-mode.
@@ -87,7 +88,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [U, Sscofpmf]
   VSINH:
     location: 59
     description: When set, mhpmcounter19 does not increment while the hart in operating in VS-mode.
@@ -103,7 +105,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   VUINH:
     location: 58
     description: When set, mhpmcounter19 does not increment while the hart in operating in VU-mode.
@@ -119,7 +122,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   EVENT:
     location: 57-0
     description: Event selector for performance counter `mhpmcounter19`.
diff --git a/arch/csr/Zihpm/mhpmevent20.yaml b/arch/csr/Zihpm/mhpmevent20.yaml
index 5ec2c960b..9547a0125 100644
--- a/arch/csr/Zihpm/mhpmevent20.yaml
+++ b/arch/csr/Zihpm/mhpmevent20.yaml
@@ -71,7 +71,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [S, Sscofpmf]
   UINH:
     location: 60
     description: When set, mhpmcounter20 does not increment while the hart in operating in U-mode.
@@ -87,7 +88,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [U, Sscofpmf]
   VSINH:
     location: 59
     description: When set, mhpmcounter20 does not increment while the hart in operating in VS-mode.
@@ -103,7 +105,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   VUINH:
     location: 58
     description: When set, mhpmcounter20 does not increment while the hart in operating in VU-mode.
@@ -119,7 +122,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   EVENT:
     location: 57-0
     description: Event selector for performance counter `mhpmcounter20`.
diff --git a/arch/csr/Zihpm/mhpmevent21.yaml b/arch/csr/Zihpm/mhpmevent21.yaml
index 166aa50f6..de94e1535 100644
--- a/arch/csr/Zihpm/mhpmevent21.yaml
+++ b/arch/csr/Zihpm/mhpmevent21.yaml
@@ -71,7 +71,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [S, Sscofpmf]
   UINH:
     location: 60
     description: When set, mhpmcounter21 does not increment while the hart in operating in U-mode.
@@ -87,7 +88,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [U, Sscofpmf]
   VSINH:
     location: 59
     description: When set, mhpmcounter21 does not increment while the hart in operating in VS-mode.
@@ -103,7 +105,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   VUINH:
     location: 58
     description: When set, mhpmcounter21 does not increment while the hart in operating in VU-mode.
@@ -119,7 +122,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   EVENT:
     location: 57-0
     description: Event selector for performance counter `mhpmcounter21`.
diff --git a/arch/csr/Zihpm/mhpmevent22.yaml b/arch/csr/Zihpm/mhpmevent22.yaml
index 21f1a3c4b..f44ee9407 100644
--- a/arch/csr/Zihpm/mhpmevent22.yaml
+++ b/arch/csr/Zihpm/mhpmevent22.yaml
@@ -71,7 +71,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [S, Sscofpmf]
   UINH:
     location: 60
     description: When set, mhpmcounter22 does not increment while the hart in operating in U-mode.
@@ -87,7 +88,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [U, Sscofpmf]
   VSINH:
     location: 59
     description: When set, mhpmcounter22 does not increment while the hart in operating in VS-mode.
@@ -103,7 +105,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   VUINH:
     location: 58
     description: When set, mhpmcounter22 does not increment while the hart in operating in VU-mode.
@@ -119,7 +122,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   EVENT:
     location: 57-0
     description: Event selector for performance counter `mhpmcounter22`.
diff --git a/arch/csr/Zihpm/mhpmevent23.yaml b/arch/csr/Zihpm/mhpmevent23.yaml
index 4e6b623c0..88df06d93 100644
--- a/arch/csr/Zihpm/mhpmevent23.yaml
+++ b/arch/csr/Zihpm/mhpmevent23.yaml
@@ -71,7 +71,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [S, Sscofpmf]
   UINH:
     location: 60
     description: When set, mhpmcounter23 does not increment while the hart in operating in U-mode.
@@ -87,7 +88,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [U, Sscofpmf]
   VSINH:
     location: 59
     description: When set, mhpmcounter23 does not increment while the hart in operating in VS-mode.
@@ -103,7 +105,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   VUINH:
     location: 58
     description: When set, mhpmcounter23 does not increment while the hart in operating in VU-mode.
@@ -119,7 +122,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   EVENT:
     location: 57-0
     description: Event selector for performance counter `mhpmcounter23`.
diff --git a/arch/csr/Zihpm/mhpmevent24.yaml b/arch/csr/Zihpm/mhpmevent24.yaml
index 89cd20f66..0f0ada8a1 100644
--- a/arch/csr/Zihpm/mhpmevent24.yaml
+++ b/arch/csr/Zihpm/mhpmevent24.yaml
@@ -71,7 +71,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [S, Sscofpmf]
   UINH:
     location: 60
     description: When set, mhpmcounter24 does not increment while the hart in operating in U-mode.
@@ -87,7 +88,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [U, Sscofpmf]
   VSINH:
     location: 59
     description: When set, mhpmcounter24 does not increment while the hart in operating in VS-mode.
@@ -103,7 +105,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   VUINH:
     location: 58
     description: When set, mhpmcounter24 does not increment while the hart in operating in VU-mode.
@@ -119,7 +122,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   EVENT:
     location: 57-0
     description: Event selector for performance counter `mhpmcounter24`.
diff --git a/arch/csr/Zihpm/mhpmevent25.yaml b/arch/csr/Zihpm/mhpmevent25.yaml
index 4b291b985..97c6e853a 100644
--- a/arch/csr/Zihpm/mhpmevent25.yaml
+++ b/arch/csr/Zihpm/mhpmevent25.yaml
@@ -71,7 +71,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [S, Sscofpmf]
   UINH:
     location: 60
     description: When set, mhpmcounter25 does not increment while the hart in operating in U-mode.
@@ -87,7 +88,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [U, Sscofpmf]
   VSINH:
     location: 59
     description: When set, mhpmcounter25 does not increment while the hart in operating in VS-mode.
@@ -103,7 +105,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   VUINH:
     location: 58
     description: When set, mhpmcounter25 does not increment while the hart in operating in VU-mode.
@@ -119,7 +122,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   EVENT:
     location: 57-0
     description: Event selector for performance counter `mhpmcounter25`.
diff --git a/arch/csr/Zihpm/mhpmevent26.yaml b/arch/csr/Zihpm/mhpmevent26.yaml
index 0ca5a2c6f..d87816792 100644
--- a/arch/csr/Zihpm/mhpmevent26.yaml
+++ b/arch/csr/Zihpm/mhpmevent26.yaml
@@ -71,7 +71,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [S, Sscofpmf]
   UINH:
     location: 60
     description: When set, mhpmcounter26 does not increment while the hart in operating in U-mode.
@@ -87,7 +88,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [U, Sscofpmf]
   VSINH:
     location: 59
     description: When set, mhpmcounter26 does not increment while the hart in operating in VS-mode.
@@ -103,7 +105,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   VUINH:
     location: 58
     description: When set, mhpmcounter26 does not increment while the hart in operating in VU-mode.
@@ -119,7 +122,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   EVENT:
     location: 57-0
     description: Event selector for performance counter `mhpmcounter26`.
diff --git a/arch/csr/Zihpm/mhpmevent27.yaml b/arch/csr/Zihpm/mhpmevent27.yaml
index b8e7ba1d1..9b103877e 100644
--- a/arch/csr/Zihpm/mhpmevent27.yaml
+++ b/arch/csr/Zihpm/mhpmevent27.yaml
@@ -71,7 +71,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [S, Sscofpmf]
   UINH:
     location: 60
     description: When set, mhpmcounter27 does not increment while the hart in operating in U-mode.
@@ -87,7 +88,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [U, Sscofpmf]
   VSINH:
     location: 59
     description: When set, mhpmcounter27 does not increment while the hart in operating in VS-mode.
@@ -103,7 +105,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   VUINH:
     location: 58
     description: When set, mhpmcounter27 does not increment while the hart in operating in VU-mode.
@@ -119,7 +122,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   EVENT:
     location: 57-0
     description: Event selector for performance counter `mhpmcounter27`.
diff --git a/arch/csr/Zihpm/mhpmevent28.yaml b/arch/csr/Zihpm/mhpmevent28.yaml
index f9485190e..0da7dd4d9 100644
--- a/arch/csr/Zihpm/mhpmevent28.yaml
+++ b/arch/csr/Zihpm/mhpmevent28.yaml
@@ -71,7 +71,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [S, Sscofpmf]
   UINH:
     location: 60
     description: When set, mhpmcounter28 does not increment while the hart in operating in U-mode.
@@ -87,7 +88,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [U, Sscofpmf]
   VSINH:
     location: 59
     description: When set, mhpmcounter28 does not increment while the hart in operating in VS-mode.
@@ -103,7 +105,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   VUINH:
     location: 58
     description: When set, mhpmcounter28 does not increment while the hart in operating in VU-mode.
@@ -119,7 +122,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   EVENT:
     location: 57-0
     description: Event selector for performance counter `mhpmcounter28`.
diff --git a/arch/csr/Zihpm/mhpmevent29.yaml b/arch/csr/Zihpm/mhpmevent29.yaml
index 007d14987..565eeb00c 100644
--- a/arch/csr/Zihpm/mhpmevent29.yaml
+++ b/arch/csr/Zihpm/mhpmevent29.yaml
@@ -71,7 +71,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [S, Sscofpmf]
   UINH:
     location: 60
     description: When set, mhpmcounter29 does not increment while the hart in operating in U-mode.
@@ -87,7 +88,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [U, Sscofpmf]
   VSINH:
     location: 59
     description: When set, mhpmcounter29 does not increment while the hart in operating in VS-mode.
@@ -103,7 +105,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   VUINH:
     location: 58
     description: When set, mhpmcounter29 does not increment while the hart in operating in VU-mode.
@@ -119,7 +122,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   EVENT:
     location: 57-0
     description: Event selector for performance counter `mhpmcounter29`.
diff --git a/arch/csr/Zihpm/mhpmevent3.yaml b/arch/csr/Zihpm/mhpmevent3.yaml
index bf6237f55..257852678 100644
--- a/arch/csr/Zihpm/mhpmevent3.yaml
+++ b/arch/csr/Zihpm/mhpmevent3.yaml
@@ -71,7 +71,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [S, Sscofpmf]
   UINH:
     location: 60
     description: When set, mhpmcounter3 does not increment while the hart in operating in U-mode.
@@ -87,7 +88,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [U, Sscofpmf]
   VSINH:
     location: 59
     description: When set, mhpmcounter3 does not increment while the hart in operating in VS-mode.
@@ -103,7 +105,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   VUINH:
     location: 58
     description: When set, mhpmcounter3 does not increment while the hart in operating in VU-mode.
@@ -119,7 +122,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   EVENT:
     location: 57-0
     description: Event selector for performance counter `mhpmcounter3`.
diff --git a/arch/csr/Zihpm/mhpmevent30.yaml b/arch/csr/Zihpm/mhpmevent30.yaml
index 6d5926123..82446915b 100644
--- a/arch/csr/Zihpm/mhpmevent30.yaml
+++ b/arch/csr/Zihpm/mhpmevent30.yaml
@@ -71,7 +71,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [S, Sscofpmf]
   UINH:
     location: 60
     description: When set, mhpmcounter30 does not increment while the hart in operating in U-mode.
@@ -87,7 +88,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [U, Sscofpmf]
   VSINH:
     location: 59
     description: When set, mhpmcounter30 does not increment while the hart in operating in VS-mode.
@@ -103,7 +105,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   VUINH:
     location: 58
     description: When set, mhpmcounter30 does not increment while the hart in operating in VU-mode.
@@ -119,7 +122,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   EVENT:
     location: 57-0
     description: Event selector for performance counter `mhpmcounter30`.
diff --git a/arch/csr/Zihpm/mhpmevent31.yaml b/arch/csr/Zihpm/mhpmevent31.yaml
index 37b859307..6137f91ae 100644
--- a/arch/csr/Zihpm/mhpmevent31.yaml
+++ b/arch/csr/Zihpm/mhpmevent31.yaml
@@ -71,7 +71,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [S, Sscofpmf]
   UINH:
     location: 60
     description: When set, mhpmcounter31 does not increment while the hart in operating in U-mode.
@@ -87,7 +88,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [U, Sscofpmf]
   VSINH:
     location: 59
     description: When set, mhpmcounter31 does not increment while the hart in operating in VS-mode.
@@ -103,7 +105,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   VUINH:
     location: 58
     description: When set, mhpmcounter31 does not increment while the hart in operating in VU-mode.
@@ -119,7 +122,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   EVENT:
     location: 57-0
     description: Event selector for performance counter `mhpmcounter31`.
diff --git a/arch/csr/Zihpm/mhpmevent4.yaml b/arch/csr/Zihpm/mhpmevent4.yaml
index 1291ed96f..930ea289b 100644
--- a/arch/csr/Zihpm/mhpmevent4.yaml
+++ b/arch/csr/Zihpm/mhpmevent4.yaml
@@ -71,7 +71,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [S, Sscofpmf]
   UINH:
     location: 60
     description: When set, mhpmcounter4 does not increment while the hart in operating in U-mode.
@@ -87,7 +88,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [U, Sscofpmf]
   VSINH:
     location: 59
     description: When set, mhpmcounter4 does not increment while the hart in operating in VS-mode.
@@ -103,7 +105,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   VUINH:
     location: 58
     description: When set, mhpmcounter4 does not increment while the hart in operating in VU-mode.
@@ -119,7 +122,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   EVENT:
     location: 57-0
     description: Event selector for performance counter `mhpmcounter4`.
diff --git a/arch/csr/Zihpm/mhpmevent5.yaml b/arch/csr/Zihpm/mhpmevent5.yaml
index bbe2824f5..6cd4dd467 100644
--- a/arch/csr/Zihpm/mhpmevent5.yaml
+++ b/arch/csr/Zihpm/mhpmevent5.yaml
@@ -71,7 +71,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [S, Sscofpmf]
   UINH:
     location: 60
     description: When set, mhpmcounter5 does not increment while the hart in operating in U-mode.
@@ -87,7 +88,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [U, Sscofpmf]
   VSINH:
     location: 59
     description: When set, mhpmcounter5 does not increment while the hart in operating in VS-mode.
@@ -103,7 +105,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   VUINH:
     location: 58
     description: When set, mhpmcounter5 does not increment while the hart in operating in VU-mode.
@@ -119,7 +122,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   EVENT:
     location: 57-0
     description: Event selector for performance counter `mhpmcounter5`.
diff --git a/arch/csr/Zihpm/mhpmevent6.yaml b/arch/csr/Zihpm/mhpmevent6.yaml
index f4e0b15cb..8143578ab 100644
--- a/arch/csr/Zihpm/mhpmevent6.yaml
+++ b/arch/csr/Zihpm/mhpmevent6.yaml
@@ -71,7 +71,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [S, Sscofpmf]
   UINH:
     location: 60
     description: When set, mhpmcounter6 does not increment while the hart in operating in U-mode.
@@ -87,7 +88,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [U, Sscofpmf]
   VSINH:
     location: 59
     description: When set, mhpmcounter6 does not increment while the hart in operating in VS-mode.
@@ -103,7 +105,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   VUINH:
     location: 58
     description: When set, mhpmcounter6 does not increment while the hart in operating in VU-mode.
@@ -119,7 +122,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   EVENT:
     location: 57-0
     description: Event selector for performance counter `mhpmcounter6`.
diff --git a/arch/csr/Zihpm/mhpmevent7.yaml b/arch/csr/Zihpm/mhpmevent7.yaml
index c4586b60b..b0a3eb63d 100644
--- a/arch/csr/Zihpm/mhpmevent7.yaml
+++ b/arch/csr/Zihpm/mhpmevent7.yaml
@@ -71,7 +71,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [S, Sscofpmf]
   UINH:
     location: 60
     description: When set, mhpmcounter7 does not increment while the hart in operating in U-mode.
@@ -87,7 +88,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [U, Sscofpmf]
   VSINH:
     location: 59
     description: When set, mhpmcounter7 does not increment while the hart in operating in VS-mode.
@@ -103,7 +105,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   VUINH:
     location: 58
     description: When set, mhpmcounter7 does not increment while the hart in operating in VU-mode.
@@ -119,7 +122,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   EVENT:
     location: 57-0
     description: Event selector for performance counter `mhpmcounter7`.
diff --git a/arch/csr/Zihpm/mhpmevent8.yaml b/arch/csr/Zihpm/mhpmevent8.yaml
index 349fc9ca3..17d005c3d 100644
--- a/arch/csr/Zihpm/mhpmevent8.yaml
+++ b/arch/csr/Zihpm/mhpmevent8.yaml
@@ -71,7 +71,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [S, Sscofpmf]
   UINH:
     location: 60
     description: When set, mhpmcounter8 does not increment while the hart in operating in U-mode.
@@ -87,7 +88,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [U, Sscofpmf]
   VSINH:
     location: 59
     description: When set, mhpmcounter8 does not increment while the hart in operating in VS-mode.
@@ -103,7 +105,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   VUINH:
     location: 58
     description: When set, mhpmcounter8 does not increment while the hart in operating in VU-mode.
@@ -119,7 +122,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   EVENT:
     location: 57-0
     description: Event selector for performance counter `mhpmcounter8`.
diff --git a/arch/csr/Zihpm/mhpmevent9.yaml b/arch/csr/Zihpm/mhpmevent9.yaml
index fc947e3e2..28b6bdc02 100644
--- a/arch/csr/Zihpm/mhpmevent9.yaml
+++ b/arch/csr/Zihpm/mhpmevent9.yaml
@@ -71,7 +71,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [S, Sscofpmf]
   UINH:
     location: 60
     description: When set, mhpmcounter9 does not increment while the hart in operating in U-mode.
@@ -87,7 +88,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [U, Sscofpmf]
   VSINH:
     location: 59
     description: When set, mhpmcounter9 does not increment while the hart in operating in VS-mode.
@@ -103,7 +105,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   VUINH:
     location: 58
     description: When set, mhpmcounter9 does not increment while the hart in operating in VU-mode.
@@ -119,7 +122,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   EVENT:
     location: 57-0
     description: Event selector for performance counter `mhpmcounter9`.
diff --git a/arch/csr/Zihpm/mhpmeventN.layout b/arch/csr/Zihpm/mhpmeventN.layout
index 0617a27ea..f92f5a89c 100644
--- a/arch/csr/Zihpm/mhpmeventN.layout
+++ b/arch/csr/Zihpm/mhpmeventN.layout
@@ -71,7 +71,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [S, Sscofpmf]
   UINH:
     location: 60
     description: When set, mhpmcounter<%= hpm_num %> does not increment while the hart in operating in U-mode.
@@ -87,7 +88,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [U, Sscofpmf]
   VSINH:
     location: 59
     description: When set, mhpmcounter<%= hpm_num %> does not increment while the hart in operating in VS-mode.
@@ -103,7 +105,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   VUINH:
     location: 58
     description: When set, mhpmcounter<%= hpm_num %> does not increment while the hart in operating in VU-mode.
@@ -119,7 +122,8 @@ fields:
       } else {
         return 0;
       }
-    definedBy: Sscofpmf
+    definedBy:
+      allOf: [H, Sscofpmf]
   EVENT:
     location: 57-0
     description: Event selector for performance counter `mhpmcounter<%= hpm_num %>`.

From 8443702be15a8d2e28911898f98173e3c15c162f Mon Sep 17 00:00:00 2001
From: syedowaisalishah <alishahowais@gmail.com>
Date: Wed, 7 May 2025 18:45:00 +0000
Subject: [PATCH 13/15] docs(sscofpmf): add CSR yaml and layout file for
 scountovf

---
 arch/csr/Sscofpmf/scountovf.layout | 4 ++--
 arch/csr/Sscofpmf/scountovf.yaml   | 4 +++-
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/arch/csr/Sscofpmf/scountovf.layout b/arch/csr/Sscofpmf/scountovf.layout
index a178d6149..820ee48ac 100644
--- a/arch/csr/Sscofpmf/scountovf.layout
+++ b/arch/csr/Sscofpmf/scountovf.layout
@@ -51,9 +51,9 @@ sw_read(): |
   }
 
   Bits<32> value =
-  <%- (3..30).each do |num| -%>
+  <%- (3..31).each do |num| -%>
     (CSR[mhpmevent<%= num %>].OF << <%= num %>) |
   <%- end -%>
-    (CSR[mhpmevent31].OF << 31);
+    0;
 
   return value & mask;
diff --git a/arch/csr/Sscofpmf/scountovf.yaml b/arch/csr/Sscofpmf/scountovf.yaml
index 790b1daff..cf425d2dc 100644
--- a/arch/csr/Sscofpmf/scountovf.yaml
+++ b/arch/csr/Sscofpmf/scountovf.yaml
@@ -442,6 +442,8 @@ sw_read(): |
     (CSR[mhpmevent28].OF << 28) |
     (CSR[mhpmevent29].OF << 29) |
     (CSR[mhpmevent30].OF << 30) |
-    (CSR[mhpmevent31].OF << 31);
+    (CSR[mhpmevent31].OF << 31) |
+
+    0;
 
   return value & mask;

From 3a57d26b7d122b2aa3f639243aeb03234777c3f3 Mon Sep 17 00:00:00 2001
From: syedowaisalishah <alishahowais@gmail.com>
Date: Thu, 8 May 2025 08:27:07 +0000
Subject: [PATCH 14/15] docs(sscofpmf): add CSR yaml and layout file for
 scountovf

---
 arch/csr/Sscofpmf/scountovf.layout |  11 +-
 arch/csr/Sscofpmf/scountovf.yaml   | 291 ++++++++++++++---------------
 2 files changed, 151 insertions(+), 151 deletions(-)

diff --git a/arch/csr/Sscofpmf/scountovf.layout b/arch/csr/Sscofpmf/scountovf.layout
index 820ee48ac..c941a5d37 100644
--- a/arch/csr/Sscofpmf/scountovf.layout
+++ b/arch/csr/Sscofpmf/scountovf.layout
@@ -29,17 +29,18 @@ fields:
       alias: mhpmevent<%= of_num %>.OF
       location: <%= of_num %>
       description: |
-        [when="mhpmevent<%= of_num %>.EN == true"]
+        [when="HPM_COUNTER_EN[<%= of_num %>] == true"]
         Shadow copy of mhpmevent<%= of_num %> overflow (OF) bit.
 
-        [when="mhpmevent<%= of_num %>.EN == false"]
-        This field is read-only zero because the event is not enabled.
+        [when="HPM_COUNTER_EN[<%= of_num %>] == false"]
+        This field is read-only zero because the counter is not enabled.
       type(): |
-        return CSR[mhpmevent<%= of_num %>].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+        return HPM_COUNTER_EN[<%= of_num %>] ? CsrFieldType::RO : CsrFieldType::RO-H;
       reset_value(): |
-        return CSR[mhpmevent<%= of_num %>].EN ? UNDEFINED_LEGAL : 0;
+        return HPM_COUNTER_EN[<%= of_num %>] ? UNDEFINED_LEGAL : 0;
   <%- end -%>
 
+
 sw_read(): |
   Bits<32> mask;
   if (mode() == PrivilegeMode::VS) {
diff --git a/arch/csr/Sscofpmf/scountovf.yaml b/arch/csr/Sscofpmf/scountovf.yaml
index cf425d2dc..ff0c622f6 100644
--- a/arch/csr/Sscofpmf/scountovf.yaml
+++ b/arch/csr/Sscofpmf/scountovf.yaml
@@ -29,379 +29,379 @@ fields:
     alias: mhpmevent3.OF
     location: 3
     description: |
-      [when="mhpmevent3.EN == true"]
+      [when="HPM_COUNTER_EN[3] == true"]
       Shadow copy of mhpmevent3 overflow (OF) bit.
 
-      [when="mhpmevent3.EN == false"]
-      This field is read-only zero because the event is not enabled.
+      [when="HPM_COUNTER_EN[3] == false"]
+      This field is read-only zero because the counter is not enabled.
     type(): |
-      return CSR[mhpmevent3].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[3] ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return CSR[mhpmevent3].EN ? UNDEFINED_LEGAL : 0;
+      return HPM_COUNTER_EN[3] ? UNDEFINED_LEGAL : 0;
   OF4:
     alias: mhpmevent4.OF
     location: 4
     description: |
-      [when="mhpmevent4.EN == true"]
+      [when="HPM_COUNTER_EN[4] == true"]
       Shadow copy of mhpmevent4 overflow (OF) bit.
 
-      [when="mhpmevent4.EN == false"]
-      This field is read-only zero because the event is not enabled.
+      [when="HPM_COUNTER_EN[4] == false"]
+      This field is read-only zero because the counter is not enabled.
     type(): |
-      return CSR[mhpmevent4].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[4] ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return CSR[mhpmevent4].EN ? UNDEFINED_LEGAL : 0;
+      return HPM_COUNTER_EN[4] ? UNDEFINED_LEGAL : 0;
   OF5:
     alias: mhpmevent5.OF
     location: 5
     description: |
-      [when="mhpmevent5.EN == true"]
+      [when="HPM_COUNTER_EN[5] == true"]
       Shadow copy of mhpmevent5 overflow (OF) bit.
 
-      [when="mhpmevent5.EN == false"]
-      This field is read-only zero because the event is not enabled.
+      [when="HPM_COUNTER_EN[5] == false"]
+      This field is read-only zero because the counter is not enabled.
     type(): |
-      return CSR[mhpmevent5].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[5] ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return CSR[mhpmevent5].EN ? UNDEFINED_LEGAL : 0;
+      return HPM_COUNTER_EN[5] ? UNDEFINED_LEGAL : 0;
   OF6:
     alias: mhpmevent6.OF
     location: 6
     description: |
-      [when="mhpmevent6.EN == true"]
+      [when="HPM_COUNTER_EN[6] == true"]
       Shadow copy of mhpmevent6 overflow (OF) bit.
 
-      [when="mhpmevent6.EN == false"]
-      This field is read-only zero because the event is not enabled.
+      [when="HPM_COUNTER_EN[6] == false"]
+      This field is read-only zero because the counter is not enabled.
     type(): |
-      return CSR[mhpmevent6].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[6] ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return CSR[mhpmevent6].EN ? UNDEFINED_LEGAL : 0;
+      return HPM_COUNTER_EN[6] ? UNDEFINED_LEGAL : 0;
   OF7:
     alias: mhpmevent7.OF
     location: 7
     description: |
-      [when="mhpmevent7.EN == true"]
+      [when="HPM_COUNTER_EN[7] == true"]
       Shadow copy of mhpmevent7 overflow (OF) bit.
 
-      [when="mhpmevent7.EN == false"]
-      This field is read-only zero because the event is not enabled.
+      [when="HPM_COUNTER_EN[7] == false"]
+      This field is read-only zero because the counter is not enabled.
     type(): |
-      return CSR[mhpmevent7].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[7] ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return CSR[mhpmevent7].EN ? UNDEFINED_LEGAL : 0;
+      return HPM_COUNTER_EN[7] ? UNDEFINED_LEGAL : 0;
   OF8:
     alias: mhpmevent8.OF
     location: 8
     description: |
-      [when="mhpmevent8.EN == true"]
+      [when="HPM_COUNTER_EN[8] == true"]
       Shadow copy of mhpmevent8 overflow (OF) bit.
 
-      [when="mhpmevent8.EN == false"]
-      This field is read-only zero because the event is not enabled.
+      [when="HPM_COUNTER_EN[8] == false"]
+      This field is read-only zero because the counter is not enabled.
     type(): |
-      return CSR[mhpmevent8].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[8] ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return CSR[mhpmevent8].EN ? UNDEFINED_LEGAL : 0;
+      return HPM_COUNTER_EN[8] ? UNDEFINED_LEGAL : 0;
   OF9:
     alias: mhpmevent9.OF
     location: 9
     description: |
-      [when="mhpmevent9.EN == true"]
+      [when="HPM_COUNTER_EN[9] == true"]
       Shadow copy of mhpmevent9 overflow (OF) bit.
 
-      [when="mhpmevent9.EN == false"]
-      This field is read-only zero because the event is not enabled.
+      [when="HPM_COUNTER_EN[9] == false"]
+      This field is read-only zero because the counter is not enabled.
     type(): |
-      return CSR[mhpmevent9].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[9] ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return CSR[mhpmevent9].EN ? UNDEFINED_LEGAL : 0;
+      return HPM_COUNTER_EN[9] ? UNDEFINED_LEGAL : 0;
   OF10:
     alias: mhpmevent10.OF
     location: 10
     description: |
-      [when="mhpmevent10.EN == true"]
+      [when="HPM_COUNTER_EN[10] == true"]
       Shadow copy of mhpmevent10 overflow (OF) bit.
 
-      [when="mhpmevent10.EN == false"]
-      This field is read-only zero because the event is not enabled.
+      [when="HPM_COUNTER_EN[10] == false"]
+      This field is read-only zero because the counter is not enabled.
     type(): |
-      return CSR[mhpmevent10].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[10] ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return CSR[mhpmevent10].EN ? UNDEFINED_LEGAL : 0;
+      return HPM_COUNTER_EN[10] ? UNDEFINED_LEGAL : 0;
   OF11:
     alias: mhpmevent11.OF
     location: 11
     description: |
-      [when="mhpmevent11.EN == true"]
+      [when="HPM_COUNTER_EN[11] == true"]
       Shadow copy of mhpmevent11 overflow (OF) bit.
 
-      [when="mhpmevent11.EN == false"]
-      This field is read-only zero because the event is not enabled.
+      [when="HPM_COUNTER_EN[11] == false"]
+      This field is read-only zero because the counter is not enabled.
     type(): |
-      return CSR[mhpmevent11].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[11] ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return CSR[mhpmevent11].EN ? UNDEFINED_LEGAL : 0;
+      return HPM_COUNTER_EN[11] ? UNDEFINED_LEGAL : 0;
   OF12:
     alias: mhpmevent12.OF
     location: 12
     description: |
-      [when="mhpmevent12.EN == true"]
+      [when="HPM_COUNTER_EN[12] == true"]
       Shadow copy of mhpmevent12 overflow (OF) bit.
 
-      [when="mhpmevent12.EN == false"]
-      This field is read-only zero because the event is not enabled.
+      [when="HPM_COUNTER_EN[12] == false"]
+      This field is read-only zero because the counter is not enabled.
     type(): |
-      return CSR[mhpmevent12].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[12] ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return CSR[mhpmevent12].EN ? UNDEFINED_LEGAL : 0;
+      return HPM_COUNTER_EN[12] ? UNDEFINED_LEGAL : 0;
   OF13:
     alias: mhpmevent13.OF
     location: 13
     description: |
-      [when="mhpmevent13.EN == true"]
+      [when="HPM_COUNTER_EN[13] == true"]
       Shadow copy of mhpmevent13 overflow (OF) bit.
 
-      [when="mhpmevent13.EN == false"]
-      This field is read-only zero because the event is not enabled.
+      [when="HPM_COUNTER_EN[13] == false"]
+      This field is read-only zero because the counter is not enabled.
     type(): |
-      return CSR[mhpmevent13].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[13] ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return CSR[mhpmevent13].EN ? UNDEFINED_LEGAL : 0;
+      return HPM_COUNTER_EN[13] ? UNDEFINED_LEGAL : 0;
   OF14:
     alias: mhpmevent14.OF
     location: 14
     description: |
-      [when="mhpmevent14.EN == true"]
+      [when="HPM_COUNTER_EN[14] == true"]
       Shadow copy of mhpmevent14 overflow (OF) bit.
 
-      [when="mhpmevent14.EN == false"]
-      This field is read-only zero because the event is not enabled.
+      [when="HPM_COUNTER_EN[14] == false"]
+      This field is read-only zero because the counter is not enabled.
     type(): |
-      return CSR[mhpmevent14].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[14] ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return CSR[mhpmevent14].EN ? UNDEFINED_LEGAL : 0;
+      return HPM_COUNTER_EN[14] ? UNDEFINED_LEGAL : 0;
   OF15:
     alias: mhpmevent15.OF
     location: 15
     description: |
-      [when="mhpmevent15.EN == true"]
+      [when="HPM_COUNTER_EN[15] == true"]
       Shadow copy of mhpmevent15 overflow (OF) bit.
 
-      [when="mhpmevent15.EN == false"]
-      This field is read-only zero because the event is not enabled.
+      [when="HPM_COUNTER_EN[15] == false"]
+      This field is read-only zero because the counter is not enabled.
     type(): |
-      return CSR[mhpmevent15].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[15] ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return CSR[mhpmevent15].EN ? UNDEFINED_LEGAL : 0;
+      return HPM_COUNTER_EN[15] ? UNDEFINED_LEGAL : 0;
   OF16:
     alias: mhpmevent16.OF
     location: 16
     description: |
-      [when="mhpmevent16.EN == true"]
+      [when="HPM_COUNTER_EN[16] == true"]
       Shadow copy of mhpmevent16 overflow (OF) bit.
 
-      [when="mhpmevent16.EN == false"]
-      This field is read-only zero because the event is not enabled.
+      [when="HPM_COUNTER_EN[16] == false"]
+      This field is read-only zero because the counter is not enabled.
     type(): |
-      return CSR[mhpmevent16].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[16] ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return CSR[mhpmevent16].EN ? UNDEFINED_LEGAL : 0;
+      return HPM_COUNTER_EN[16] ? UNDEFINED_LEGAL : 0;
   OF17:
     alias: mhpmevent17.OF
     location: 17
     description: |
-      [when="mhpmevent17.EN == true"]
+      [when="HPM_COUNTER_EN[17] == true"]
       Shadow copy of mhpmevent17 overflow (OF) bit.
 
-      [when="mhpmevent17.EN == false"]
-      This field is read-only zero because the event is not enabled.
+      [when="HPM_COUNTER_EN[17] == false"]
+      This field is read-only zero because the counter is not enabled.
     type(): |
-      return CSR[mhpmevent17].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[17] ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return CSR[mhpmevent17].EN ? UNDEFINED_LEGAL : 0;
+      return HPM_COUNTER_EN[17] ? UNDEFINED_LEGAL : 0;
   OF18:
     alias: mhpmevent18.OF
     location: 18
     description: |
-      [when="mhpmevent18.EN == true"]
+      [when="HPM_COUNTER_EN[18] == true"]
       Shadow copy of mhpmevent18 overflow (OF) bit.
 
-      [when="mhpmevent18.EN == false"]
-      This field is read-only zero because the event is not enabled.
+      [when="HPM_COUNTER_EN[18] == false"]
+      This field is read-only zero because the counter is not enabled.
     type(): |
-      return CSR[mhpmevent18].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[18] ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return CSR[mhpmevent18].EN ? UNDEFINED_LEGAL : 0;
+      return HPM_COUNTER_EN[18] ? UNDEFINED_LEGAL : 0;
   OF19:
     alias: mhpmevent19.OF
     location: 19
     description: |
-      [when="mhpmevent19.EN == true"]
+      [when="HPM_COUNTER_EN[19] == true"]
       Shadow copy of mhpmevent19 overflow (OF) bit.
 
-      [when="mhpmevent19.EN == false"]
-      This field is read-only zero because the event is not enabled.
+      [when="HPM_COUNTER_EN[19] == false"]
+      This field is read-only zero because the counter is not enabled.
     type(): |
-      return CSR[mhpmevent19].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[19] ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return CSR[mhpmevent19].EN ? UNDEFINED_LEGAL : 0;
+      return HPM_COUNTER_EN[19] ? UNDEFINED_LEGAL : 0;
   OF20:
     alias: mhpmevent20.OF
     location: 20
     description: |
-      [when="mhpmevent20.EN == true"]
+      [when="HPM_COUNTER_EN[20] == true"]
       Shadow copy of mhpmevent20 overflow (OF) bit.
 
-      [when="mhpmevent20.EN == false"]
-      This field is read-only zero because the event is not enabled.
+      [when="HPM_COUNTER_EN[20] == false"]
+      This field is read-only zero because the counter is not enabled.
     type(): |
-      return CSR[mhpmevent20].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[20] ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return CSR[mhpmevent20].EN ? UNDEFINED_LEGAL : 0;
+      return HPM_COUNTER_EN[20] ? UNDEFINED_LEGAL : 0;
   OF21:
     alias: mhpmevent21.OF
     location: 21
     description: |
-      [when="mhpmevent21.EN == true"]
+      [when="HPM_COUNTER_EN[21] == true"]
       Shadow copy of mhpmevent21 overflow (OF) bit.
 
-      [when="mhpmevent21.EN == false"]
-      This field is read-only zero because the event is not enabled.
+      [when="HPM_COUNTER_EN[21] == false"]
+      This field is read-only zero because the counter is not enabled.
     type(): |
-      return CSR[mhpmevent21].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[21] ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return CSR[mhpmevent21].EN ? UNDEFINED_LEGAL : 0;
+      return HPM_COUNTER_EN[21] ? UNDEFINED_LEGAL : 0;
   OF22:
     alias: mhpmevent22.OF
     location: 22
     description: |
-      [when="mhpmevent22.EN == true"]
+      [when="HPM_COUNTER_EN[22] == true"]
       Shadow copy of mhpmevent22 overflow (OF) bit.
 
-      [when="mhpmevent22.EN == false"]
-      This field is read-only zero because the event is not enabled.
+      [when="HPM_COUNTER_EN[22] == false"]
+      This field is read-only zero because the counter is not enabled.
     type(): |
-      return CSR[mhpmevent22].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[22] ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return CSR[mhpmevent22].EN ? UNDEFINED_LEGAL : 0;
+      return HPM_COUNTER_EN[22] ? UNDEFINED_LEGAL : 0;
   OF23:
     alias: mhpmevent23.OF
     location: 23
     description: |
-      [when="mhpmevent23.EN == true"]
+      [when="HPM_COUNTER_EN[23] == true"]
       Shadow copy of mhpmevent23 overflow (OF) bit.
 
-      [when="mhpmevent23.EN == false"]
-      This field is read-only zero because the event is not enabled.
+      [when="HPM_COUNTER_EN[23] == false"]
+      This field is read-only zero because the counter is not enabled.
     type(): |
-      return CSR[mhpmevent23].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[23] ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return CSR[mhpmevent23].EN ? UNDEFINED_LEGAL : 0;
+      return HPM_COUNTER_EN[23] ? UNDEFINED_LEGAL : 0;
   OF24:
     alias: mhpmevent24.OF
     location: 24
     description: |
-      [when="mhpmevent24.EN == true"]
+      [when="HPM_COUNTER_EN[24] == true"]
       Shadow copy of mhpmevent24 overflow (OF) bit.
 
-      [when="mhpmevent24.EN == false"]
-      This field is read-only zero because the event is not enabled.
+      [when="HPM_COUNTER_EN[24] == false"]
+      This field is read-only zero because the counter is not enabled.
     type(): |
-      return CSR[mhpmevent24].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[24] ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return CSR[mhpmevent24].EN ? UNDEFINED_LEGAL : 0;
+      return HPM_COUNTER_EN[24] ? UNDEFINED_LEGAL : 0;
   OF25:
     alias: mhpmevent25.OF
     location: 25
     description: |
-      [when="mhpmevent25.EN == true"]
+      [when="HPM_COUNTER_EN[25] == true"]
       Shadow copy of mhpmevent25 overflow (OF) bit.
 
-      [when="mhpmevent25.EN == false"]
-      This field is read-only zero because the event is not enabled.
+      [when="HPM_COUNTER_EN[25] == false"]
+      This field is read-only zero because the counter is not enabled.
     type(): |
-      return CSR[mhpmevent25].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[25] ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return CSR[mhpmevent25].EN ? UNDEFINED_LEGAL : 0;
+      return HPM_COUNTER_EN[25] ? UNDEFINED_LEGAL : 0;
   OF26:
     alias: mhpmevent26.OF
     location: 26
     description: |
-      [when="mhpmevent26.EN == true"]
+      [when="HPM_COUNTER_EN[26] == true"]
       Shadow copy of mhpmevent26 overflow (OF) bit.
 
-      [when="mhpmevent26.EN == false"]
-      This field is read-only zero because the event is not enabled.
+      [when="HPM_COUNTER_EN[26] == false"]
+      This field is read-only zero because the counter is not enabled.
     type(): |
-      return CSR[mhpmevent26].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[26] ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return CSR[mhpmevent26].EN ? UNDEFINED_LEGAL : 0;
+      return HPM_COUNTER_EN[26] ? UNDEFINED_LEGAL : 0;
   OF27:
     alias: mhpmevent27.OF
     location: 27
     description: |
-      [when="mhpmevent27.EN == true"]
+      [when="HPM_COUNTER_EN[27] == true"]
       Shadow copy of mhpmevent27 overflow (OF) bit.
 
-      [when="mhpmevent27.EN == false"]
-      This field is read-only zero because the event is not enabled.
+      [when="HPM_COUNTER_EN[27] == false"]
+      This field is read-only zero because the counter is not enabled.
     type(): |
-      return CSR[mhpmevent27].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[27] ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return CSR[mhpmevent27].EN ? UNDEFINED_LEGAL : 0;
+      return HPM_COUNTER_EN[27] ? UNDEFINED_LEGAL : 0;
   OF28:
     alias: mhpmevent28.OF
     location: 28
     description: |
-      [when="mhpmevent28.EN == true"]
+      [when="HPM_COUNTER_EN[28] == true"]
       Shadow copy of mhpmevent28 overflow (OF) bit.
 
-      [when="mhpmevent28.EN == false"]
-      This field is read-only zero because the event is not enabled.
+      [when="HPM_COUNTER_EN[28] == false"]
+      This field is read-only zero because the counter is not enabled.
     type(): |
-      return CSR[mhpmevent28].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[28] ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return CSR[mhpmevent28].EN ? UNDEFINED_LEGAL : 0;
+      return HPM_COUNTER_EN[28] ? UNDEFINED_LEGAL : 0;
   OF29:
     alias: mhpmevent29.OF
     location: 29
     description: |
-      [when="mhpmevent29.EN == true"]
+      [when="HPM_COUNTER_EN[29] == true"]
       Shadow copy of mhpmevent29 overflow (OF) bit.
 
-      [when="mhpmevent29.EN == false"]
-      This field is read-only zero because the event is not enabled.
+      [when="HPM_COUNTER_EN[29] == false"]
+      This field is read-only zero because the counter is not enabled.
     type(): |
-      return CSR[mhpmevent29].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[29] ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return CSR[mhpmevent29].EN ? UNDEFINED_LEGAL : 0;
+      return HPM_COUNTER_EN[29] ? UNDEFINED_LEGAL : 0;
   OF30:
     alias: mhpmevent30.OF
     location: 30
     description: |
-      [when="mhpmevent30.EN == true"]
+      [when="HPM_COUNTER_EN[30] == true"]
       Shadow copy of mhpmevent30 overflow (OF) bit.
 
-      [when="mhpmevent30.EN == false"]
-      This field is read-only zero because the event is not enabled.
+      [when="HPM_COUNTER_EN[30] == false"]
+      This field is read-only zero because the counter is not enabled.
     type(): |
-      return CSR[mhpmevent30].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[30] ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return CSR[mhpmevent30].EN ? UNDEFINED_LEGAL : 0;
+      return HPM_COUNTER_EN[30] ? UNDEFINED_LEGAL : 0;
   OF31:
     alias: mhpmevent31.OF
     location: 31
     description: |
-      [when="mhpmevent31.EN == true"]
+      [when="HPM_COUNTER_EN[31] == true"]
       Shadow copy of mhpmevent31 overflow (OF) bit.
 
-      [when="mhpmevent31.EN == false"]
-      This field is read-only zero because the event is not enabled.
+      [when="HPM_COUNTER_EN[31] == false"]
+      This field is read-only zero because the counter is not enabled.
     type(): |
-      return CSR[mhpmevent31].EN ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[31] ? CsrFieldType::RO : CsrFieldType::RO-H;
     reset_value(): |
-      return CSR[mhpmevent31].EN ? UNDEFINED_LEGAL : 0;
+      return HPM_COUNTER_EN[31] ? UNDEFINED_LEGAL : 0;
 
 sw_read(): |
   Bits<32> mask;
@@ -443,7 +443,6 @@ sw_read(): |
     (CSR[mhpmevent29].OF << 29) |
     (CSR[mhpmevent30].OF << 30) |
     (CSR[mhpmevent31].OF << 31) |
-
     0;
 
   return value & mask;

From af59d420db0fdca214b211201ab3af19f7bc8bfb Mon Sep 17 00:00:00 2001
From: syedowaisalishah <alishahowais@gmail.com>
Date: Thu, 8 May 2025 15:30:46 +0000
Subject: [PATCH 15/15] docs(sscofpmf): correct CSR yaml and layout file for
 scountovf

---
 arch/csr/Sscofpmf/scountovf.layout |  2 +-
 arch/csr/Sscofpmf/scountovf.yaml   | 58 +++++++++++++++---------------
 2 files changed, 30 insertions(+), 30 deletions(-)

diff --git a/arch/csr/Sscofpmf/scountovf.layout b/arch/csr/Sscofpmf/scountovf.layout
index c941a5d37..b5b677d45 100644
--- a/arch/csr/Sscofpmf/scountovf.layout
+++ b/arch/csr/Sscofpmf/scountovf.layout
@@ -35,7 +35,7 @@ fields:
         [when="HPM_COUNTER_EN[<%= of_num %>] == false"]
         This field is read-only zero because the counter is not enabled.
       type(): |
-        return HPM_COUNTER_EN[<%= of_num %>] ? CsrFieldType::RO : CsrFieldType::RO-H;
+        return HPM_COUNTER_EN[<%= of_num %>] ? CsrFieldType::RO : CsrFieldType::ROH;
       reset_value(): |
         return HPM_COUNTER_EN[<%= of_num %>] ? UNDEFINED_LEGAL : 0;
   <%- end -%>
diff --git a/arch/csr/Sscofpmf/scountovf.yaml b/arch/csr/Sscofpmf/scountovf.yaml
index ff0c622f6..77331fe80 100644
--- a/arch/csr/Sscofpmf/scountovf.yaml
+++ b/arch/csr/Sscofpmf/scountovf.yaml
@@ -35,7 +35,7 @@ fields:
       [when="HPM_COUNTER_EN[3] == false"]
       This field is read-only zero because the counter is not enabled.
     type(): |
-      return HPM_COUNTER_EN[3] ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[3] ? CsrFieldType::RO : CsrFieldType::ROH;
     reset_value(): |
       return HPM_COUNTER_EN[3] ? UNDEFINED_LEGAL : 0;
   OF4:
@@ -48,7 +48,7 @@ fields:
       [when="HPM_COUNTER_EN[4] == false"]
       This field is read-only zero because the counter is not enabled.
     type(): |
-      return HPM_COUNTER_EN[4] ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[4] ? CsrFieldType::RO : CsrFieldType::ROH;
     reset_value(): |
       return HPM_COUNTER_EN[4] ? UNDEFINED_LEGAL : 0;
   OF5:
@@ -61,7 +61,7 @@ fields:
       [when="HPM_COUNTER_EN[5] == false"]
       This field is read-only zero because the counter is not enabled.
     type(): |
-      return HPM_COUNTER_EN[5] ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[5] ? CsrFieldType::RO : CsrFieldType::ROH;
     reset_value(): |
       return HPM_COUNTER_EN[5] ? UNDEFINED_LEGAL : 0;
   OF6:
@@ -74,7 +74,7 @@ fields:
       [when="HPM_COUNTER_EN[6] == false"]
       This field is read-only zero because the counter is not enabled.
     type(): |
-      return HPM_COUNTER_EN[6] ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[6] ? CsrFieldType::RO : CsrFieldType::ROH;
     reset_value(): |
       return HPM_COUNTER_EN[6] ? UNDEFINED_LEGAL : 0;
   OF7:
@@ -87,7 +87,7 @@ fields:
       [when="HPM_COUNTER_EN[7] == false"]
       This field is read-only zero because the counter is not enabled.
     type(): |
-      return HPM_COUNTER_EN[7] ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[7] ? CsrFieldType::RO : CsrFieldType::ROH;
     reset_value(): |
       return HPM_COUNTER_EN[7] ? UNDEFINED_LEGAL : 0;
   OF8:
@@ -100,7 +100,7 @@ fields:
       [when="HPM_COUNTER_EN[8] == false"]
       This field is read-only zero because the counter is not enabled.
     type(): |
-      return HPM_COUNTER_EN[8] ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[8] ? CsrFieldType::RO : CsrFieldType::ROH;
     reset_value(): |
       return HPM_COUNTER_EN[8] ? UNDEFINED_LEGAL : 0;
   OF9:
@@ -113,7 +113,7 @@ fields:
       [when="HPM_COUNTER_EN[9] == false"]
       This field is read-only zero because the counter is not enabled.
     type(): |
-      return HPM_COUNTER_EN[9] ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[9] ? CsrFieldType::RO : CsrFieldType::ROH;
     reset_value(): |
       return HPM_COUNTER_EN[9] ? UNDEFINED_LEGAL : 0;
   OF10:
@@ -126,7 +126,7 @@ fields:
       [when="HPM_COUNTER_EN[10] == false"]
       This field is read-only zero because the counter is not enabled.
     type(): |
-      return HPM_COUNTER_EN[10] ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[10] ? CsrFieldType::RO : CsrFieldType::ROH;
     reset_value(): |
       return HPM_COUNTER_EN[10] ? UNDEFINED_LEGAL : 0;
   OF11:
@@ -139,7 +139,7 @@ fields:
       [when="HPM_COUNTER_EN[11] == false"]
       This field is read-only zero because the counter is not enabled.
     type(): |
-      return HPM_COUNTER_EN[11] ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[11] ? CsrFieldType::RO : CsrFieldType::ROH;
     reset_value(): |
       return HPM_COUNTER_EN[11] ? UNDEFINED_LEGAL : 0;
   OF12:
@@ -152,7 +152,7 @@ fields:
       [when="HPM_COUNTER_EN[12] == false"]
       This field is read-only zero because the counter is not enabled.
     type(): |
-      return HPM_COUNTER_EN[12] ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[12] ? CsrFieldType::RO : CsrFieldType::ROH;
     reset_value(): |
       return HPM_COUNTER_EN[12] ? UNDEFINED_LEGAL : 0;
   OF13:
@@ -165,7 +165,7 @@ fields:
       [when="HPM_COUNTER_EN[13] == false"]
       This field is read-only zero because the counter is not enabled.
     type(): |
-      return HPM_COUNTER_EN[13] ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[13] ? CsrFieldType::RO : CsrFieldType::ROH;
     reset_value(): |
       return HPM_COUNTER_EN[13] ? UNDEFINED_LEGAL : 0;
   OF14:
@@ -178,7 +178,7 @@ fields:
       [when="HPM_COUNTER_EN[14] == false"]
       This field is read-only zero because the counter is not enabled.
     type(): |
-      return HPM_COUNTER_EN[14] ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[14] ? CsrFieldType::RO : CsrFieldType::ROH;
     reset_value(): |
       return HPM_COUNTER_EN[14] ? UNDEFINED_LEGAL : 0;
   OF15:
@@ -191,7 +191,7 @@ fields:
       [when="HPM_COUNTER_EN[15] == false"]
       This field is read-only zero because the counter is not enabled.
     type(): |
-      return HPM_COUNTER_EN[15] ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[15] ? CsrFieldType::RO : CsrFieldType::ROH;
     reset_value(): |
       return HPM_COUNTER_EN[15] ? UNDEFINED_LEGAL : 0;
   OF16:
@@ -204,7 +204,7 @@ fields:
       [when="HPM_COUNTER_EN[16] == false"]
       This field is read-only zero because the counter is not enabled.
     type(): |
-      return HPM_COUNTER_EN[16] ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[16] ? CsrFieldType::RO : CsrFieldType::ROH;
     reset_value(): |
       return HPM_COUNTER_EN[16] ? UNDEFINED_LEGAL : 0;
   OF17:
@@ -217,7 +217,7 @@ fields:
       [when="HPM_COUNTER_EN[17] == false"]
       This field is read-only zero because the counter is not enabled.
     type(): |
-      return HPM_COUNTER_EN[17] ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[17] ? CsrFieldType::RO : CsrFieldType::ROH;
     reset_value(): |
       return HPM_COUNTER_EN[17] ? UNDEFINED_LEGAL : 0;
   OF18:
@@ -230,7 +230,7 @@ fields:
       [when="HPM_COUNTER_EN[18] == false"]
       This field is read-only zero because the counter is not enabled.
     type(): |
-      return HPM_COUNTER_EN[18] ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[18] ? CsrFieldType::RO : CsrFieldType::ROH;
     reset_value(): |
       return HPM_COUNTER_EN[18] ? UNDEFINED_LEGAL : 0;
   OF19:
@@ -243,7 +243,7 @@ fields:
       [when="HPM_COUNTER_EN[19] == false"]
       This field is read-only zero because the counter is not enabled.
     type(): |
-      return HPM_COUNTER_EN[19] ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[19] ? CsrFieldType::RO : CsrFieldType::ROH;
     reset_value(): |
       return HPM_COUNTER_EN[19] ? UNDEFINED_LEGAL : 0;
   OF20:
@@ -256,7 +256,7 @@ fields:
       [when="HPM_COUNTER_EN[20] == false"]
       This field is read-only zero because the counter is not enabled.
     type(): |
-      return HPM_COUNTER_EN[20] ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[20] ? CsrFieldType::RO : CsrFieldType::ROH;
     reset_value(): |
       return HPM_COUNTER_EN[20] ? UNDEFINED_LEGAL : 0;
   OF21:
@@ -269,7 +269,7 @@ fields:
       [when="HPM_COUNTER_EN[21] == false"]
       This field is read-only zero because the counter is not enabled.
     type(): |
-      return HPM_COUNTER_EN[21] ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[21] ? CsrFieldType::RO : CsrFieldType::ROH;
     reset_value(): |
       return HPM_COUNTER_EN[21] ? UNDEFINED_LEGAL : 0;
   OF22:
@@ -282,7 +282,7 @@ fields:
       [when="HPM_COUNTER_EN[22] == false"]
       This field is read-only zero because the counter is not enabled.
     type(): |
-      return HPM_COUNTER_EN[22] ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[22] ? CsrFieldType::RO : CsrFieldType::ROH;
     reset_value(): |
       return HPM_COUNTER_EN[22] ? UNDEFINED_LEGAL : 0;
   OF23:
@@ -295,7 +295,7 @@ fields:
       [when="HPM_COUNTER_EN[23] == false"]
       This field is read-only zero because the counter is not enabled.
     type(): |
-      return HPM_COUNTER_EN[23] ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[23] ? CsrFieldType::RO : CsrFieldType::ROH;
     reset_value(): |
       return HPM_COUNTER_EN[23] ? UNDEFINED_LEGAL : 0;
   OF24:
@@ -308,7 +308,7 @@ fields:
       [when="HPM_COUNTER_EN[24] == false"]
       This field is read-only zero because the counter is not enabled.
     type(): |
-      return HPM_COUNTER_EN[24] ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[24] ? CsrFieldType::RO : CsrFieldType::ROH;
     reset_value(): |
       return HPM_COUNTER_EN[24] ? UNDEFINED_LEGAL : 0;
   OF25:
@@ -321,7 +321,7 @@ fields:
       [when="HPM_COUNTER_EN[25] == false"]
       This field is read-only zero because the counter is not enabled.
     type(): |
-      return HPM_COUNTER_EN[25] ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[25] ? CsrFieldType::RO : CsrFieldType::ROH;
     reset_value(): |
       return HPM_COUNTER_EN[25] ? UNDEFINED_LEGAL : 0;
   OF26:
@@ -334,7 +334,7 @@ fields:
       [when="HPM_COUNTER_EN[26] == false"]
       This field is read-only zero because the counter is not enabled.
     type(): |
-      return HPM_COUNTER_EN[26] ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[26] ? CsrFieldType::RO : CsrFieldType::ROH;
     reset_value(): |
       return HPM_COUNTER_EN[26] ? UNDEFINED_LEGAL : 0;
   OF27:
@@ -347,7 +347,7 @@ fields:
       [when="HPM_COUNTER_EN[27] == false"]
       This field is read-only zero because the counter is not enabled.
     type(): |
-      return HPM_COUNTER_EN[27] ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[27] ? CsrFieldType::RO : CsrFieldType::ROH;
     reset_value(): |
       return HPM_COUNTER_EN[27] ? UNDEFINED_LEGAL : 0;
   OF28:
@@ -360,7 +360,7 @@ fields:
       [when="HPM_COUNTER_EN[28] == false"]
       This field is read-only zero because the counter is not enabled.
     type(): |
-      return HPM_COUNTER_EN[28] ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[28] ? CsrFieldType::RO : CsrFieldType::ROH;
     reset_value(): |
       return HPM_COUNTER_EN[28] ? UNDEFINED_LEGAL : 0;
   OF29:
@@ -373,7 +373,7 @@ fields:
       [when="HPM_COUNTER_EN[29] == false"]
       This field is read-only zero because the counter is not enabled.
     type(): |
-      return HPM_COUNTER_EN[29] ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[29] ? CsrFieldType::RO : CsrFieldType::ROH;
     reset_value(): |
       return HPM_COUNTER_EN[29] ? UNDEFINED_LEGAL : 0;
   OF30:
@@ -386,7 +386,7 @@ fields:
       [when="HPM_COUNTER_EN[30] == false"]
       This field is read-only zero because the counter is not enabled.
     type(): |
-      return HPM_COUNTER_EN[30] ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[30] ? CsrFieldType::RO : CsrFieldType::ROH;
     reset_value(): |
       return HPM_COUNTER_EN[30] ? UNDEFINED_LEGAL : 0;
   OF31:
@@ -399,7 +399,7 @@ fields:
       [when="HPM_COUNTER_EN[31] == false"]
       This field is read-only zero because the counter is not enabled.
     type(): |
-      return HPM_COUNTER_EN[31] ? CsrFieldType::RO : CsrFieldType::RO-H;
+      return HPM_COUNTER_EN[31] ? CsrFieldType::RO : CsrFieldType::ROH;
     reset_value(): |
       return HPM_COUNTER_EN[31] ? UNDEFINED_LEGAL : 0;