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[WebAssembly] Prototype f32x4.relaxed_dot_bf16x8_add_f32
As proposed in WebAssembly/relaxed-simd#77. Only an LLVM intrinsic and a clang builtin are implemented. Since there is no bfloat16 type, use u16 to represent the bfloats in the builtin function arguments. Differential Revision: https://reviews.llvm.org/D133428
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clang/include/clang/Basic/BuiltinsWebAssembly.def

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@@ -188,6 +188,7 @@ TARGET_BUILTIN(__builtin_wasm_relaxed_q15mulr_s_i16x8, "V8sV8sV8s", "nc", "relax
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TARGET_BUILTIN(__builtin_wasm_dot_i8x16_i7x16_s_i16x8, "V8sV16ScV16Sc", "nc", "relaxed-simd")
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TARGET_BUILTIN(__builtin_wasm_dot_i8x16_i7x16_add_s_i32x4, "V4iV16ScV16ScV4i", "nc", "relaxed-simd")
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TARGET_BUILTIN(__builtin_wasm_relaxed_dot_bf16x8_add_f32_f32x4, "V4fV8UsV8UsV4f", "nc", "relaxed-simd")
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#undef BUILTIN
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#undef TARGET_BUILTIN

clang/lib/CodeGen/CGBuiltin.cpp

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@@ -18870,6 +18870,14 @@ Value *CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
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CGM.getIntrinsic(Intrinsic::wasm_dot_i8x16_i7x16_add_signed);
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return Builder.CreateCall(Callee, {LHS, RHS, Acc});
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}
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case WebAssembly::BI__builtin_wasm_relaxed_dot_bf16x8_add_f32_f32x4: {
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Value *LHS = EmitScalarExpr(E->getArg(0));
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Value *RHS = EmitScalarExpr(E->getArg(1));
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Value *Acc = EmitScalarExpr(E->getArg(2));
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Function *Callee =
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CGM.getIntrinsic(Intrinsic::wasm_relaxed_dot_bf16x8_add_f32);
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return Builder.CreateCall(Callee, {LHS, RHS, Acc});
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}
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default:
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return nullptr;
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}

clang/test/CodeGen/builtins-wasm.c

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@@ -794,3 +794,10 @@ i32x4 dot_i8x16_i7x16_add_s_i32x4(i8x16 a, i8x16 b, i32x4 c) {
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// WEBASSEMBLY-SAME: <16 x i8> %a, <16 x i8> %b, <4 x i32> %c)
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// WEBASSEMBLY-NEXT: ret
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}
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f32x4 relaxed_dot_bf16x8_add_f32_f32x4(u16x8 a, u16x8 b, f32x4 c) {
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return __builtin_wasm_relaxed_dot_bf16x8_add_f32_f32x4(a, b, c);
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// WEBASSEMBLY: call <4 x float> @llvm.wasm.relaxed.dot.bf16x8.add.f32
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// WEBASSEMBLY-SAME: <8 x i16> %a, <8 x i16> %b, <4 x float> %c)
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// WEBASSEMBLY-NEXT: ret
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}

llvm/include/llvm/IR/IntrinsicsWebAssembly.td

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@@ -285,6 +285,12 @@ def int_wasm_dot_i8x16_i7x16_add_signed:
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[llvm_v16i8_ty, llvm_v16i8_ty, llvm_v4i32_ty],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_relaxed_dot_bf16x8_add_f32:
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Intrinsic<[llvm_v4f32_ty],
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[llvm_v8i16_ty, llvm_v8i16_ty, llvm_v4f32_ty],
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[IntrNoMem, IntrSpeculatable]>;
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//===----------------------------------------------------------------------===//
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// Thread-local storage intrinsics
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//===----------------------------------------------------------------------===//

llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td

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@@ -1466,3 +1466,15 @@ defm RELAXED_DOT_ADD :
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(v16i8 V128:$lhs), (v16i8 V128:$rhs), (v4i32 V128:$acc)))],
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"i32x4.dot_i8x16_i7x16_add_s\t$dst, $lhs, $rhs, $acc",
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"i32x4.dot_i8x16_i7x16_add_s", 0x113>;
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//===----------------------------------------------------------------------===//
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// Relaxed BFloat16 dot product
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//===----------------------------------------------------------------------===//
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defm RELAXED_DOT_BFLOAT :
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RELAXED_I<(outs V128:$dst), (ins V128:$lhs, V128:$rhs, V128:$acc),
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(outs), (ins),
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[(set (v4f32 V128:$dst), (int_wasm_relaxed_dot_bf16x8_add_f32
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(v8i16 V128:$lhs), (v8i16 V128:$rhs), (v4f32 V128:$acc)))],
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"f32x4.relaxed_dot_bf16x8_add_f32\t$dst, $lhs, $rhs, $acc",
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"f32x4.relaxed_dot_bf16x8_add_f32", 0x114>;

llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll

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@@ -786,6 +786,20 @@ define <4 x float> @relaxed_max_v4f32(<4 x float> %a, <4 x float> %b) {
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ret <4 x float> %v
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}
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; CHECK-LABEL: relaxed_dot_bf16x8_add_f32:
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; CHECK-NEXT: .functype relaxed_dot_bf16x8_add_f32 (v128, v128, v128) -> (v128){{$}}
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; CHECK-NEXT: f32x4.relaxed_dot_bf16x8_add_f32 $push[[R:[0-9]+]]=, $0, $1, $2{{$}}
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; CHECK-NEXT: return $pop[[R]]{{$}}
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declare <4 x float> @llvm.wasm.relaxed.dot.bf16x8.add.f32(<8 x i16>, <8 x i16>,
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<4 x float>)
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define <4 x float> @relaxed_dot_bf16x8_add_f32(<8 x i16> %a, <8 x i16> %b,
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<4 x float> %c) {
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%v = call <4 x float> @llvm.wasm.relaxed.dot.bf16x8.add.f32(
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<8 x i16> %a, <8 x i16> %b, <4 x float> %c
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)
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ret <4 x float> %v
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}
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; ==============================================================================
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; 2 x f64
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; ==============================================================================

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